First connection of my controller built to drive the Pertec drive

PERTEC D3422 DRIVE RESTORATION

I completed assignment of the input and output signals of the Pertec interface to specific pins on my Nexys2 fpga board. Now wiring the cables to connect the two. In addition to the cabling, I have to whip up some logic in the fpga board to drive the Pertec to test out various functions. My first set of tests focus on basic and arm movement functions.

I spent my lunch hour coding VHDL and began wiring the cables. The work is very slow and tedious, with lots of cross checking including using a continuity checker. It took about two hours to complete the first of two 50 conductor ribbon cables.

Only some of the conductors are connected to the fpga and these skip past ground conductors in a random looking pattern. The FPGA board has multiple 2x6 sockets around the periphery but four of the 12 pins are for ground or power, thus I can connect eight signals to each of these 2x6 positions. I am using 1x2 connectors to hook to the fpga board 2x6, thus four separate small connectors plug into each 2x6 position. Checking, stripping, soldering, crimping, insulating and checking again - finally I had finished the first 50 conductor cable breakout to twelve of the 1x2 connections into the fpga board.

The second 50 conductor cable is about the same number of connections, so wiring it up will consume the late afternoon/early evening. I intend to check all of the resulting connectors for shorts between the two signals that are side by side, plus verify that none are connected to ground, doing this for the all cables on the interface. The incoming signals in the second cable will be checked for shorts to ground and for high voltages, before I connect them to the fpga board sockets.

I may have enough VHDL complete to allow the board to display status of various types, such as unit ready, lack of busy, index and sector pulses plus the sector counter all whirring faster than the eye can see, and the absence of any detected malfunctions. Thus, if all the wiring and testing is done by tonight I can fire the system up for a first look, but I am expecting this will be deferred until tomorrow as I run out of free time.

As daylight faded, I had finished the wiring and testing of my connections but hadn't powered up the drive to check for high voltages. In order to do this, I need a mount for the fpga board that will allow me to open the drive and observe its behavior. Late tonight I set up a stand and prepared to do the voltage tests on Wednesday.