Looking at possible failure in flip flop circuit on SLT card -

TESTED THE CIRCUIT TO RESET THE KBD RESPONSE FLIPFLOP

I monitored the various signals that should trigger the reset of the KBD Response flipflop. These are XIO Sense with Reset 15 AND with Area 1, to form a trigger pulse. That is, when we are doing the sense reset to our device, it drops low. The flipflop reset gate will respond to this falling edge only if the two gating inputs are low. 

One gating input is the value of notQ, thus it is low when the KBD Response flipflop is set. The other gating input is B Bit 1, the sense device value when KBD Response is set in the DSW. The addition of the B Bit 1 as a gate will only reset for this condition as it conditions the trigger for reset. 

I saw the conditions arise that should cause a reset, but it did not change the flipflop. That is why the KBD Response status stays active once it is every triggered and thus continually requests Interrupt Level 4. I will go probe further to see why this is not resetting as it should. I also will pull the card and test it on the bench. 

I captured a good shot of the flipflop being activated. When the keyboard is first pressed, it fires two single shot pulses. One sets a gate for KBD Response then when the second expires we get a falling edge that is the trigger for the flipflop set circuit. You can see the falling edge in dark blue on the oscilloscope, with the purple gating single active (low). The result is shown in the yellow (KBD Response Q output) and cyan (KBD Response notQ output). 

Setting the KBD Response flipflop