Another possibility for eliminating need for donor SLT cards when making substitute cards

SMT SPRING CONTACTS MIGHT ALLOW ME TO MAKE PCBS WITH INTEGRAL SOCKETS

I found some gold plated spring contacts that are .098" wide and solder onto a PCB pad. They can be set side by side to form the 12 connections on each side of an SLT connector. Their height above the PCB will create a .257" width between the two sides of the card. Since the SLT backplane (board) pins are spaced at .25", this should give a decent fit with adequate quality connection. 

I ordered some and will experiment to see how they work with real SLT boards. This is easier than having wires running from PCB pads to a standalone connector which must be anchored somehow to the PCB (see earlier post). 

Wrapping up disk drive work, ready to install back in the IBM 1130

VERIFIED WRITE LOGIC AND WRITE CLOCK OUTPUT

The 2310 drive is formally called the 13SD and had the project name Ramkit. It is installed inside an IBM 1130 as its internal disk drive, as well as in a standalone cabinet labeled the IBM 2310, with one or two drives per cabinet. 

The 13SD produces a 720 KHz clock that it sends to the controller logic in the 1130 when the drive is switched to write mode. The controller logic controls a Write Data line based on the state of the clock signal. The clock pulse is sent by a constant 1 emitted during one half of the clock, whereas during the other half of the clock cycle the data value of 1 or 0 is transmitted.

Any time the Write Data line is 1, a flipflop reverses state which flips the magnetic orientation at the head. This writes a pulse on the disk surface. I verified the 720KHz signal was correct and that the flipflop toggles any time the Write Data line is set to 1. 

The recording scheme on this disk drive, like many, alternates clock pulses with data. Each half of the 720KHz clock cycle is called a bit cell. The first bit cell is always a 1, so it always records a pulse by flipping the magnetic field. The second bit cell records a pulse if the data bit is 1, otherwise it does NOT flip the field and no pulse is written. 

When writing a sector, the controller will send a preamble of a fixed duration of 0 data bits. That is, every clock cycle has a pulse in the clock bit cell and no pulse in the data bit cell. When reading, the drive will synchronize itself during the preamble so that it can tell the difference between clock and data bit cells. This will be important when data bit values of 1 are read later, as it comes in from the read head as a stream of pulses that must be separated. This synchronization is analogous to a phase locked loop. 

The drive, because it is in step with the alternation of clock and data bit cells that were written previously, can steer the clock pulses out one signal wire (Read Clock) and steer a pulse out a second signal wire (Read Data) when the data bit cell had a pulse. This helps the controller logic in the 1130 know that the absence of a pulse is a data value of 0, since the next clock pulse arrives with no pulse incoming on the Read Data line. On the other hand, if a pulse arrives on the Read Data line then we know the data value was 1. 

CHECKED SIGNAL VOLTAGES PRESENTED TO RK-05 EMULATOR HARDWARE

The RK-05 emulator has interface chips to read signals from the 13SD drive and from controller logic in the 1130. It also has chips to write signals to the drive and the controller logic. It acts as a relay station for many signals. For example, when the 13SD produces a Sector Mark pulse, it is passed along through the emulator to the 1130 controller logic. 

Reading and writing activities involve passing the 720KHz clock through to the controller logic, but not passing the signals to activate read or write on to the 13SD. Instead, the emulator produces a stream of pulses on Read Clock and Read Data signal lines to the controller logic, just as would have been emitted by the drive if its heads were really reading the disk cartridge. These come from DRAM in the emulator which holds the data that would be on a 2315 disk cartridge. 

For a write operation, the Write Data line from the controller logic, emitted in coordination with the 720KHz coming from the disk drive, will stop at the emulator. The incoming data bits will be captured and used to update the DRAM image of a disk cartridge.

When the disk drive first spins up, the emulator transfers the 1MB of content for a 2315 cartridge from an SD card to the DRAM where it is available for reading and writing. When the drive is switched off, the updated contents of DRAM are written back to the SD card. The format of the file on the SD card matches that used by the IBM 1130 simulators, which makes it relatively easy to create or update virtual 2315 cartridges. 

We have all the signals and behavior we need from the disk drive in order to work, in concert with the emulator, to perform exactly like the 13SD drive with a physical 2315 cartridge for each disk image on the SD card. 

PUT ALL COVERS BACK ON

I put everything back together, removing temporary wires, and installing all covers. The drive is ready to insert inside the IBM 1130. It is bolted to four spots on the frame, sitting on the right side of the 1130 as viewed from the front. A swinging door on the front of the 1130 is opened to gain access to the drive. A blue handle is pulled down to allow a 2315 disk cartridge to be pushed into the drive or removed.

The handle is then returned to its upright position and the Run switch on the drive is turned on. A lamp on the main panel of the 1130 indicate when the drive is unlocked, allowing the blue handle to be pulled down. The drive must not be spinning, otherwise the drive is locked. Another lamp on the main panel indicates when the drive is able to be accessed - File Ready - which turns on about 100 seconds after the Run switch is activated with a cartridge inside. 

The drive has a set of wires delivering 115VAC to power the motors. Another set of wires feeds the +3, -3, +6 and +48V DC power to the rear of the machine. A signal cable is normally connected from the 1130 controller logic to the backplane of the disk drive. However, this cable connects to the disk emulator, and a cable from the emulator is plugged into the13SD drive instead. Lastly, wires connect to the Run switch, Disk Unlock lamp and File Ready lamp. These will all be attached once the drive is bolted into place. 

PREPARED TO LIFT INTO THE 1130 WHEN I GET A HELPER

The drive weighs quite a bit and is bulky. It has to be lowered into the frame of the 1130 until the four bolts enter holes in support beams for the disk drive. The weight is therefore about two to three feet away from the body as the drive is lowered and raised in the frame opening, which introduces quite a lever arm that amplifies the effect of the weight on the people holding it. 

I will have to wait until someone relatively strong accompanies me to the workshop so that the two of us can lift the disk drive off the rolling lift table and insert it into its place inside the 1130 frame. Once is is sitting on its supports, I can do all the other work solo. 

DESIGNING INTERFACE BOARD AND CABLING TO USE RK-05 EMULATOR AND DRIVE

The RK-05 Emulator that I am leveraging as the core of my Virtual 2315 Cartridge Facility has two forty pin IDC style ribbon cables, one of which will interface with the IBM 1130 controller logic and the other will interface with the 13SD disk drive. Neither the 1130 nor the 13SD use IDC 40 pin connectors, so I will build an interface board to connect everything together. 

The signal interface from the 1130 controller logic is a cable with an SLT card connector on the end. This has the 24 pins of any SLT card and fits into one card slot on the backplane of the 13SD. Normally that cable with connector would be plugged into the 13SD. 

My board will feature two of the IDC 40 pin connectors, a set of header pins that match the card connector from the 1130 controller logic, and will have another cable with SLT card connector that is plugged into the 13SD. This puts the emulator in between the 1130 controller logic and the drive. A few additional connections will provide access to the Run switch and the state of the Disk Unlock lamp. 

Those two latter connections are either at 48V or 0, depending on their logical condition. The voltages are not safe to connect to the emulator. The interface board will have two level shifter circuits to convert the 48V signal into a TTL level output in order to feed it into the emulator. 

I have yet to finalize the shape of the interface board, nor the exact location where it will be mounted inside the IBM 1130. 

Evaluating possible SLT card socket to eliminate need for donor cards

ORDERED HOUSING THAT SHOULD BE COMPATIBLE WITH SLT BACKPLANES

Conor Krukosky had found a housing that appears to fit, as he has a long term project to create his own SLT cards. I ordered a couple of them so that I can do some experimenting. These are free hanging, which does mean I have some mechanical issues to content with in order to attach these to a PCB so it can be plugged in and out of the backplane socket. 

It would use thin wire-wrap (30 gauge) wire to span from PCB pads to the connector pins. I have to work out a good way to affix the housings on the end of the PCB in the correct spacing. The other issue with this methodology is that for a single size SLT card, the cost is about $13 for the connector and pins, not prohibitive for a few cards. 

For Conor's project to replace about 300 cards to repopulate his 1130, the costs add up especially when you add in the PCB cost plus the components to go on them. If you figure $40 per SLT card, which is probably low, then the cost for the 1130 card complement would be around $12,000. 

The IBM housing has features on the ends that key it so the card can't be inserted upside down into a card slot. I have to work out how the housing I just bought will work with the backplane keying, which might require some modification of the housing to make it fit. 

Replacing the head connector required excavation to determine the coil wiring; successful conclusion

DUG OUT THE CONNECTOR TO FIGURE OUT WHICH WIRES GO TO EACH PIN

I know from the documentation about the wires from the SLT card compartment out to the female head connectors. There is a violet and a grey wire that goes to the two read/write coils, a red wire that goes to the erase coil, and a black wire that was not covered anywhere else. That wire hooked to the ground pins on the backplane.

The diagram for the wiring of the heads does not show the fourth wire - the ground connection. The only mention at all is the table above. 

However, from the head to the male connector, there is no documentation. I could figure out the pins because the connector is asymmetric, with two pins close together on one side and the other two spaced further apart. However, if I was not able to solder the pins then I would need to make a new connection and for that I would need to know how to identify the various coil connections.

I picked away at the plastic molded connector to expose the ends of the pins that were broken off as well as expose enough of the wires connected to those pins that I could confirm colors. It is good that I did, because the four wires I found in the connector were red, blue, white and white. These don't match the colors from the female connector. 

I found nothing at all about the wiring in the connector in the documentation for the 2310 drive which is also the internal drive on the IBM 1130. However, the heads are quite similar to the multiplatter 2311 drive that IBM introduced at about the same time. I looked over some documentation on that drive and found the head wiring that matched my connector.

It shows the four wires connected, unlike the documentation for the 2310 drive. I made some resistance measurements across the four wires hooked to the upper head, which was undamaged. I found no connectivity at all through the black wire to any of the other three, while the diagram above implies there is. I checked to the female connector for the damaged lower head and that too had no connection from the black wire to the pin on the connector. I removed one of the female connectors and could see that there is no connection at all to the fourth pin.

It was apparent that the black wire, hooked to ground, serves only as a cable shield up to the female connector. No such ground shield exists from the male connector to the head itself. That means that in the excavated male connector I was repairing, the blue wire was unused on this end and could be ignored. 

It was a painstaking process to solder the pins back on the two active positions where they had snapped off. Once I was certain that there was good connectivity, I covered the connector with Kapton tape and reinstalled it on the machine.

I tested from the backplane pins for the same resistances and connectivity, ensuring that my reattached female cable had good wire-wrap connections and that the entire path to the coils in the head was intact. 

HEADS BACK IN PLACE AND A VIDEO OF THE ARM MOVEMENTS

You can just see the two holes on the left side above the top head and below the bottom one that had pivot pins inserted. These allowed head loading plates to be pushed down onto the backs of the heads in order to force them down to fly 125 microinches above the spinning disk surface. 

The video I took shows the drive spinning, finishing up the 98 second delay before you can hear and see the head load solenoid snap closed. The solenoid is near the bottom left in the video, you may have to watch a second time to spot it. That would normally close the two heads around the spinning platter, but for safety reasons this is not done on this drive.

I then moved the arm forward and back in continuous mode, then stepped it in both 20 mil and 10 mil step sizes. You can see the backsides of the two detents, one for even and one for odd tracks. When moving in 10 mil steps, the detents alternate, whereas with 20 mil step the same detent is re-engaged after each movement. 

Replacement 5806223 card finished and being tested in the 1130

FINISHED ALL JUMPER WIRE TESTING OF THE STACKED PCB + DONOR SLT CARD

Making sure the card was properly connected required me to beep out each pin to the connection on the PCB. Once that was done, I checked for shorts to adjacent pins. No shorts there. The last set of tests were checks for pins that were connected to adjacent pads on the PCB where the jumpers are connected. That too was clean.

CARD INSERTED IN VCF 1130 AND SOME TESTS PERFORMED

When I first powered up, I heard a circuit breaker click off in the 1130 - the 6V supply. Because my card doesn't use the 1130 power rails of +6, +3 and -3, I ignored those pins. However, the donor card had a short between the +6 and the +3 pins (B11 and D03) most likely caused by the holes I drilled to fasten on my PCB.

The fix was easy - since the connections from the pins to the donor card are short traces, I just cut away the traces to isolate both of them from the card. The problem went away.

The level 3 interrupt was active and wasn't reset when I pushed the Reset button on the 1130. I pulled the card out and have begun checking on the bench. It is possible that the short that connected the +6 and +3 supplies also injected overvoltage into some of the chips on my card. 

Disk heads cleaned and reinstalled on the IBM 1130 internal disk drive, but too rough to be used

CLEANING HEAD SURFACES IN PREPARATION FOR FIRST ATTEMPT TO FLY ON PLATTER

The heads must be completely clean, free of any oxide or other buildups on the surface. These will be pushed down onto the spinning surface but will fly above it on a cushion of air about 125 microinches thick. That is produced by the air being dragged by the disk surface as it speeds under the head at around 45 miles per hour. 

Any imperfections on the disk surface will affect the air cushion and potentially apply a torque on the head which causes a portion to ride lower than the target height. Worse, if the oxide or other foreign objects on the head are larger than .125 mils they will touch the disk platter surface. 

This is in addition to the need to avoid dust, smoke or other particles in the air inside the cartridge that are on the large enough to jam between the head and disk platter, driving it down onto the surface. In mild cases this causes short light scratches on the surface and the head resumes flying. However, it can dig into the oxide surface and result in the head scraping along producing serious platter and head damage. 

I use 99% isopropyl alcohol (which of course has absorbed atmospheric moisture and is not really that pure when applied) with wipes that don't shed lint. The goal is a really clean head surface with no particles at all on the face, as verified under the microscope. 

Once I finished, the heads are just too scraped up to safely be lowered onto the disk surface. This drive will have to run with my virtual 2315 emulation facility which keeps the heads from touching the unused disk cartridge but otherwise spins the cartridge and moves the arms in and out, while serving data from the emulator instead of the disk heads. 

MAKING SURE LOWER ARM HAS THE PROPER SPRING BEND FOR INITIAL POSITION

The disk head is attached to a thin springy metal which allows the head to pivot in two directions. That springy metal is welded to a somewhat heavier springy metal piece that is screwed onto a thicker sturdy aluminum holder. 

The springy piece that screws to the holder should be pre-bent to hold the head up and away from the disk surface when the drive is stopped. A mechanism in the drive will push on the rear of the disk head to load it down to the surface, bending the springy piece. 

The lower head appeared to sit very close to the disk platter when it was stopped, which introduces some risk that it could be hit by a platter as a cartridge is pushed into the drive. Also, when the heads are unloaded they shouldn't be near the platter in case of vibration of the machine or other events. 

I got everything put together and sitting at the correct spacing. I spun up a cartridge with the drive modified only so that the two pivots that push the heads down on the platter are removed. Thus, the head load solenoid will activate and the drive will believe the heads are down, but they remain safely above the surface. 

REPAIR OF HEAD CONNECTOR WHICH HAD BROKEN PINS

The connector from the cables of the disk head to the rest of the drive electronics has four small pins, male on the disk head side. Two of the four were broken and not making contact when I tested the circuit initially. 

I planned to repair them by digging out enough plastic around the male connector to expose a bit of the metal of the pin remnant. I can then solder the pin back onto the remnant, holding the pin in a surgical clamp with kapton tape to block heat transfer. If I could do this very very carefully I could restore the pin sufficiently to insert one time and anchor everything in place. 

However, the heads are not going to actually be used to read and write, since they are not safe to fly 125 microinches over the spinning platter. I am going to make an alternate connection, just to allow the read/write circuits to see the impedance and current they expect. 

HEADS REINSTALLED IN DRIVE

The sturdy hold of the heads slides into a channel on the disk arm, up against a screw adjuster tip that controls how far it moves in away from the center of the disk hub. A clamp gets tightened to hold it in place. 

The head positioning is critical for reading previously recorded cartridges properly. Each track is spaced 10 mils apart and the actual data content is considerably narrower after the erase coil cleans away the outer edges of the signal. The head needs to be as close to centered over the center of the track as possible. 

There is an alignment process that achieves this, which I have written about in other posts. I won't need to perform this, since the disk heads are not actually accessing the disk cartridge inserted. The data is instead flowing to files on an SD card in the emulator I will attach to the drive. 

Parts arrived, finally got drive startup and arm seeking to work

SWISS ARMY KNIFE OF TIME DELAY RELAYS BEING USED

This device cost just over $22 and provides a very wide range of solutions, including of course the 90 to 100 second turn on delay we need for the IBM 1130 internal disk drive. The drive provides a choice of 

• Turn on with a set delay after power is applied
• Turn on for a fixed duration when power is applied
• Repeatedly alternate on and off for equal durations, starting off
• Repeatedly alternate on and off for equal durations, starting on
• After a trigger signal, wait for a set duration then turn off
• A trigger signal turns it on for a set time, then off
• At the end of a trigger signal, turns on for a set time, then off
• Trigger signal turns on with set delay, then same delay before turning off
• Alternatively latch on or off upon each trigger signal
• Pulse on after a set delay when power applied, for a 0.5 second duration

Provides continuously variable delay setting in ten ranges from 0.1s to 10 days

Is powered by 12 to 240V of DC or AC at 50 or 60 Hz. 

Comes with either SPDT or DPDT contacts.

I am using it with 48V DC, in the first mode, set to 100 seconds. I only need a single pole normally closed switch. Super overkill but cheaper than buying a used time delay that is just the functionality I needed. 

WIRED IN AND TESTED, MOUNTED PERMANENTLY

The relay is installed and works properly - I get 98 seconds delay, which is right in the 90 to 100 second zone from the documentation. It sits nicely inside the power box. 

INVESTIGATING RESISTANCE IN THE MOTOR ON CIRCUIT

Since the scope showed an 8V voltage drop across a pair of switches in the motor turn on circuit, I checked them out with a meter and the resistance was really low. I pulled the PCB that the wire connects into and the voltage still popped up to 8. Finally, I happened to check that a fat wire jumper was good and found 3.5K between the terminals involved!

ALD SEEMED TO MATCH THE POWER STRIP WIRING, BUT IT DIDN'T

The wiring of the power terminal block in the ALD shows a jumper between terminals 4 and 6, installed on IBM 1130 systems. When I looked at the terminal block on the machine, there appeared to be a fat jumper right where the ALD showed it.

That certainly looks like a jumper, but it isn't. When I measured between terminals 4 and 6, it was 3.5K. I removed the screws to measure the jumper by itself and that is when I discovered that it is not a jumper. It is a ground wire screwed into the metal base on its underside and hooked to terminal 4. 

If you look closely it is obvious, but when viewing from somewhat above, it really looked like a U shaped jumper between the two terminals. The connection between the two terminals must be completed back inside the IBM 1130, although the ALD certainly makes it look like it happens here on the terminal block.

 I whipped up a jumper, added it to the wires already present there, and was ready to test. I set up the scope to monitor the -Drive Motor On signal to see if it now sat down at ground level, then look at the Integrator and ramp generator/detector relative timing. In particular I wanted to be sure the 70 percent latch didn't turn on. 

While I was looking at signal, 98 seconds elapsed and I heard the clang of the head loading solenoid activating! A quick probe of the -File Ready signal showed the drive happy and ready to accept commands.

USING CE SWITCHES TO MOVE THE ARM IN AND OUT

I tried the switches, asking to move the arm 20 mils inward toward the center of the platter and saw it move! I tried both 10 and 20 mil steps, forward and reverse movement, with success at each attempt. Holding down the continuous step switch produced a satisfying buzz as the drive moved about 100 tracks forward and then back. It is apparent that the 70 percent latch was what was blocking arm movement before this. 

RETESTED EMERGENCY RETRACT, THIS TIME SUCCESSFULLY

The logic in the disk drive looks at the status of the Home microswitch which senses if the arm is at track 0. If not, when DC power is turned on, the arm should move backwards repeatedly until it reaches home. With the power off, I moved the arm out away from home and then activated the 48V supply. The arm backed right up. 

TAPPING HOME SWITCH PRODUCES A FEW REVERSE MOVEMENT ATTEMPTS. 

I noticed that every once in a while the arm would make a single seek attempt while it was sitting at home. I tried wiggling the wires and back of the microswitch, which would cause the attempts. I suspect that there is a contact that needs cleaning there.

MUCH IS WORKING CORRECTLY ON THE DRIVE

The drive does its startup and power down, emergency retraction, emits the sector and index pulses properly, goes into File Ready state after the 98 second delay and head loading, and moves in and out on command. 

WORK AHEAD TO FINISH THE DISK DRIVE

I have to repair the connector for the one disk head, remount both of them after cleaning them really well, and try to fly the on a cartridge. The cartridge itself will need a really good cleaning as well before I even make the attempt. 

Aligning the heads involves moving them slightly inward with an adjustment screw while watching a signal pattern on an oscilloscope. A special pattern is recorded on the Customer Engineer (CE) cartridge for this purpose, where the track is recorded in a special eccentric path. 

An adapter substitutes the erase coil for the read/write coil because the erase coil is only sensitive to the two outer sections of a track, not the center. The read/write head records a wide track and the erase head trims away the outer bands to make the remaining signal narrow. Thus, the erase head poles are only focused on the outer edges - the curb and not the street. 

With the eccentric path on the CE cartridge, the track is oscillating inward and outward of the centerline of the current head position. When the amount of signal detected on one pole is the same as the amount detected on the other pole, the head is properly centered between the eccentric extremes. 

When the heads are aligned, I can watch the signal produced by the read electronics to validate much of the remaining electronics. All of these steps can be done without connecting the drive to the IBM 1130. Writing, however, is not permitted with the cable disconnected so that will have to wait until I reinstall the drive inside the 1130 cabinet. 

BIG RESISTORS ARRIVED, FINISHED REPAIR OF 35V REGULATOR BOARD IN DRIVE

NEW PCBS FOR REPLACEMENT 6223 CARD THAT INTERFACES 1627 PLOTTER

I got my components and the PCB blanks for the final version today. Before I solder together one of these, I decided to finish up the original with its bodge wiring, since it is working properly as far as all my bench testing is concerned. I drilled holes in the donor SLT card, soldered all the jumper wires between my PCB and donor card, then connected it with plastic screws and nuts. 

I will put a scope on the 1130 output pins, with my replacement card inserted, and run some test programs to make sure that the output to the plotter is correct and the response to the 1130 works as well. Perhaps I will even fire up the 1627 plotter carcass to verify the servo motors move under the commands, if I feel ambitious. 

Working on drive speed detection circuit issue

CONTINUING TO WORK ON THE DRIVE ON THE BENCH

Here is my drive bench - the drive, multiple power supplies, and the oscilloscope to observe the operation of the disk drive circuitry. 

EVIDENCE THAT THE RATE GENERATOR AND DETECTOR WORK PROPERLY

My scope captured a bit over 100 milliseconds of startup, where the ramp generator settled down, lowering the voltage below the threshold that triggers the set pulses for the 70 percent latch. The set line is steadily high, as it should be. 

Blue line is set pulse, green is ramp detector output

This would turn off the squelch circuit to start the conversion of the index pulses into a voltage that represents the frequency of those pulses. At nominal speed, the integrator will generate about 5.5V if the pulses are arriving at the proper rate - one each 10 milliseconds - due to the drive rotating at 1500 RPM. 

SQUELCH CIRCUIT IS MISBEHAVING EARLY, WOULD BE OKAY LATER

I see that the squelch output seems okay near the end of the spinup, as seen by the purple line in the first scope trace in this post. However, at the beginning it is not correct at all. 

The yellow line is the integrator output, which should have been blocked by the squelch circuit until the drive is up to speed and the blue line attains a steady high level. The green line is the ramp detector output, still up at 5V. It will stay that way for more than 80 milliseconds before it begins dropping. The purple line is the squelch circuit output, low allowing the integrator to run while it slowly builds up to a logic high state. 

It appears that the squelch does get up to the high level but does so too late to stop the integrator from zooming over the threshold. When the detector sees the integrator reach a target voltage, it stops resetting the 70 percent latch. Since the blue line is still emitting set pulses this early in the spinup, the latch will lock to the on state. 

7235 IS A VERY DENSE SLT CARD AND CHALLENGING TO REVERSE ENGINEER

The card has seventeen SLT modules, seven discrete transistors, three discrete diodes, quite a few individual resistors and capacitors, plus many packs containing multiple resistors or RC networks. Many of the traces run under components on the top side, especially the SLT modules, so visual tracing doesn't work well. 

Reverse engineering requires a lot of reference material, to understand the parts within each module type and the nature of all the resistor, capacitor or RC packs. The transistors are private labeled, meaning that their specifications can't be matched to commercially equivalent part numbers. 

It would take many hours to decipher and draw out the schematics for the card. Instead of doing a wholesale recreation of the schematics, I will draw out what I need once I can laser focus on specific gates or areas of the design that are malfunctioning. 

SQUELCH CIRCUIT SHOULD START OUT IN HIGH OUTPUT BUT DOESN'T

The intent of the speed detection circuits is to have the squelch producing a logic high until the ramp generator/detector has stabilized at full speed with a steady high output. Only then should the squelch go low. It is starting low. This may be due to a bad diode, capacitor or transistor that is pulling the output line down when it should not. 

The squelch logic is extremely simple on paper - a single AND gate with inverted output (NAND in modern terminology), fed by one signal that goes high when the motor is running and another signal that goes high when our rate generator/detector achieves a steady state of logic high. 

That is the point in time when the squelch line should drop to logic low state, freeing the integrator to be charged up by index pulses every 10 ms. Since the squelch out begins low, the integrator does its thing far too early. The ramp generator/detector took about 100 milliseconds to get to its steady state value, but the integrator is running in the first 10 milliseconds, when it should have waited.

Neither input to the AND gate is accessible by pins on the card - they are purely internal. Only the output pin B05 is accessible, making it hard to determine whether the gate is malfunctioning or one of the inputs is wonky. 

The motor running signal is produced by an inverter (NOT gate) which is wired to the motor start circuit. The signal going into the inverter is the 48V present through the Start solenoid, but to activate the solenoid our side of the coil is pulled to ground. This occurs through the start switch and a microswitch that indicates that a cartridge is in the drive. When I observed the input to the inverter, I saw a disturbing bounce up to 8V on the line, which will cause the inverter to output logic low. 

The blue line is the 48V signal -Drive Motor On which is inverted then used in the NAND gate to combine with the steady set pulse level that will eventually be produced when the green line becomes a steady high signal. The yellow line is the integrator, running because the squelch isn't blocking it. The purple line is the output of the squelch NAND gate, extremely wrong and actually looking like the integrator output is shorting the squelch gate. 

Just as troubling, when I look at the drive motor on signal in blue, it drops steeply to ground when the start switch is activated, as it should, but then climbs back up to about 8V which is far too high to be seem as a logic low input to the inverter. 

The effective circuit for that signal is not complex. 48V flows through the motor relay, through a microswitch and then through a temporary SPST toggle switch I use to start the drive, finally to ground. In order to see 8V at this point, the resistance of the microswitch and toggle switch must be high enough to form a voltage divider with the effective resistance of the motor relay coil, 

The switches and wire should be nearly zero but perhaps I need to burnish the contacts. Electrically, the resistance of the two switches to ground is in the ratio of 8 to 40 with the resistance of the motor relay coil - this produces 8/48 of the end voltage at the junction where we feed the inverter. 

If we assume the relay coil consumes 5W, which is too high but for the sake of the analysis I picked a number that would draw a bit more than 100ma at 48V. That coil would present a resistance of 480 to 500 ohms at 48V to draw the 100ma current. It is more likely that the coil presents a resistance about five times as high and the current and power consumption would be five times as small. 

To see an 8V voltage drop on the resistance between ground and the inverter input, assuming the 100ma current in the circuit, means that we have about 80 ohms of resistance between the -DC Motor On wire and the ground, passing through the two switches. Realistically if the current is indeed about five times smaller, typical of relays of this sort, then the resistance would be five times larger. That is an unexpectedly high level. 

Another possibility is a defect in the card that is injecting this 8V from the input of the inverter. Our supply rails are 3 and 6V, thus this doesn't seem likely either. 

Failure to try to load heads as drive comes to speed narrowed to defect in one card

FIRST TRY TO HAVE HEAD LOAD SOLENOID ACTIVATE WAS UNSUCCESSFUL

The 90 second time delay relay, which I am waiting to replace, opens a circuit that is at ground initially but when disconnected is seen as logic high. When that signal goes high, it powers the head load solenoid to force the heads onto the disk surface. I used a wire with alligator clips to substitute for the relay contacts, intending to unhook the wire to trigger the head loading.

However, when I did this, nothing happened. It didn't take a lot of probing around to fine that the '70 percent latch' was active. This is a circuit that detects when the disk rotation speed slows below 1050 RPM, forcing the heads to unload and requiring a power cycle of the drive to reset. Now, I could see from the sector and index pulses that the disk was right on speed, so this was a spurious error detection. 

SPEED DETECTOR CIRCUITS IN THE DRIVE

The machine has circuits that validate when the drive is up to speed before the heads can be loaded, and they also detect when the speed slows below 70% of nominal. These two interact with each other and drive the 70 percent latch I mentioned earlier. 

The bottom of the disk platter inside the cartridge has eight slots evenly spaced around the periphery which generate the sector pulses, plus there is a second slot just after one of the eight which is used to generate one sector pulse per rotation. 

The sector pulses are used to drive the speed detectors. One of the detectors produces pulses that will set the 70 percent latch on, the other produces a reset signal that keeps the 70 percent latch from turning on. Thus the timing of the reset signal turning off is important relative to the setting pulses. 

The yellow line is the output of the integrator that turns off the reset control on the 70 percent latch. Its voltage rises with sector pulses until the threshold is reached that turns off the reset line, thus allowing the latch to get set by the other circuit. The green line is the inverted reset control, so when it goes high the latch can be triggered. 

The purple line is from the rate detector that creates a pulse for each sector and eventually will stabilize as a single level, unfortunately long after the reset signal (green) has turned off. I didn't capture a picture of the purple signal after it reaches that level, but there is an image in the IBM manuals that I included just below.

The purple signals create pulses, on the blue line, that set the 70 percent latch. These pulses stop once the purple signal stabilizes. The key to the proper behavior of the two detectors plus the latch is that the integrator (yellow line) should not start counting until the purple line has stabilized. There is a circuit called a squelch that should block the integrator but it does not appear to be working, thus the early integration and release of the reset signal. 

The trace above shows the squelch signal in purple, the integrator in yellow, the reset signal in green and the setting of the 70 percent latch in blue. The latch signals keep setting the 70 percent latch but the reset signal will immediately turn it off again (until the integrator reaches the threshold). 

When the pulses (blue line) setting the latch become so close together they produce a steady on level in the blue signal, which is what releases the integrator to begin its work. The squelch output (purple line) should stay low until the blue line is essentially steadily high. What we see is that the integrator begins counting, only being squelched for the first 80 milliseconds of the trace then climbing steadily. 

annotated with the scope trace line colors

from ALD

All of the circuits above are on the undocumented (to me) 7235 card you see below, packed with components. I will have to reverse engineer the squelch and integrator portion so that I can determine why the squelching is not doing its job long enough. 

The ramp generator behavior based on the IBM supplied trace images implies that it charges a capacitor up to +5V and discharges it with the incoming sector pulse. The different rates of charge and discharge mean that the recovery back to +5V is slower. If the next pulse arrives before the recovery is complete, then the high voltage drops. The trace implies that it stabilizes around 3V. 

The detector that comes next is apparently a threshold detector, activating for the time when the voltage is no more than about 3V, producing the set pulses for the 70 percent latch. Once the ramp gets down steadily below 5V, the set pulse is steadily on. That leads to turning off the squelch and allowing the integrator to build up. 

In the second scope trace in this post, you can see that the ramp detector pulses have not become a solid on signal yet, they are still spaced apart (blue line) but the squelch circuit output was drifting up (purple line) which no longer resets the integrator. 

My assumption is that the squelch input into the integrator, which should initially be high and only drop to low when the blue line is steady, is the malfunction here. The high input level causes the integrator to discharge the capacitor that is building up voltage from each sector pulse, so that it never accumulates a high enough level. 

Once squelch drops to low, the capacitor is free to increase its charge with each injection of energy from a sector pulse until it asymptotes to roughly 5.5V. The threshold detector is set to some voltage that corresponds to approximately 1500 RPM rotation. This turns off the reset line for the 70 percent latch so that if it is ever presented with another set pulse from the ramp detector, it will latch on and stay that way until the drive is powered down. 

If the pulse arrival rate slows enough, the voltage on the ramp generator begins to climb back above 3V towards 5V. The detector then produces the set pulses, which turn on the latch. The reset signal won't turn back on until the drive has slowed to about 30 RPM when the integrator result gets low enough. The drive is already coasting to a stop at this point. 

Importantly, until the drive motor is turned off, the latch stays active blocking disk activity. The drive is reported as not ready and the heads are unloaded while the latch is set. Thus, if for some reason the disk speed gets dangerously slow (< 70%) during operation, while it keeps spinning the drive inactivates itself and the operator must turn it off completely before restarting. 

The fine ballet of charging, discharging, thresholds and pulse production depends on the values of capacitors and resistors on the 7235 card. This is in addition to the usual possibility of failed transistors or diodes on the card. 

Time delay relay for disk drive is bad - bought generic replacement

TIME DELAY RELAY IN INTERNAL DISK DRIVE FOR IBM 1130

The platter has to spin for about 90 seconds in order for temperatures to stabilize and any loose dust to be blown out of the cartridge before the heads can safely be lowered onto the surface of the disk. This is controlled by a time delay relay that is powered in parallel with the spindle motor relay. 

A time delay circuit inside the relay should cause it to take roughly 90 seconds before the relay pulls in, switching contacts that are wired into the drive electronics. The contacts are wired so that the normally closed contact is hooked to ground and thus the delay signal is at logic low initially. When the relay energizes this signal is disconnected from ground, thus becoming logic high to the drive circuitry.

When it goes high, assuming the spindle is still spinning at its nominal 1500 rpm, the drive electronics will activate the Head Load solenoid. This forces the backs of the heads down to the disk surface. They fly on an air cushion due to the 25 rotation per second spinning. 

With the heads at a point two inches in from the outside of the 14" platter, we have a 10" diameter circle thus about 31.4" of travel distance per rotation. The heads are moving 785 inches per second or roughly 20 meters per second around the circular track. A speed of 72 Km per hour is going to experience a lot of air resistance. 

The air is dragged along with the disk surface at the very small height that the disk head flies, which is what imparts the force to keep the head off the disk surface. 

The head load solenoid has a tab that depresses a microswitch when it has activated. The signal is used to switch on File Ready, the signal that informs the 1130 controller logic that the disk is ready to accept commands to move, read and write. 

REMOVED AND TESTED HOOKED TO 48V BENCH SUPPLY

I disconnected the wires and unscrewed the relay from the AC box of the disk drive. Hooking it up to my bench power supply, I supplied 48V and started a stopwatch to time the activation. Immediately, I noticed that the relay was drawing quite a bit of current, consuming about 36W of power during the time it should be simply charging an RC network to turn on a transistor in 90 seconds. 

The relay never activated and the power draw remained steady long after the time interval was up. I could feel some current flowing in the coil - insufficient to pull the armature down but enough that if I assisted the armature it would hold in the activated position. 

DISASSEMBLED AND INSPECTING COMPONENTS

The relay has a rectangular box on one side which contains the circuitry. It consists of a few resistors, capacitors, diodes, one transistor and one potentiometer. It has five wires running to the relay coil and the terminals on the relay, which suggests that the coil of the solenoid is not a single monolithic winding. 

I removed key components to measure them without any interference. The capacitors measured fine. One resistor had drifted about 30% high and the other was on spec. Both diodes tested good on the VOM at least. The transistor voltage gaps looked odd, however. They were not regular silicon nor germanium junction gaps. 

Given the partial energization of the coil and the failure to change state after the time delay, the transistor may be the bad part causing everything, but I am not certain. The transistor and capacitors all had private label markings, making it impossible to correlate to a part number I can order. For example, the transistor is marked GE P-1901-28 and the bigger capacitor is marked 1068-6720. 

GENERIC TIME DELAY RELAY PURCHASED TO TAKE THE PLACE OF DEAD RELAY

Generic delay relays are available at really good prices, offering a variety of activation voltages and delay adjustment ranges. I found a part that will activate with 48V DC and can be set to 90 or 100 second delay. When it arrives I will connect it to the drive thus restoring its ability to load heads and become ready for use.