Thursday, October 16, 2025

Continued testing 1130 MRAM board - working on the retriggering

WIRED UP A TIMER TO SEE ACTIVITY ON ALL PINS

I tacked small wires on the pins so that I could watch the various pins to determine where the problem arises that results in the SN74LVC1G123 chip retriggering when it shouldn't. First I watched the VCC and ground rails at the chip to see if they were contributing to the problem, but they were rock solid.

I then focused in on the retriggering and noticed that from time to time, I would get a single pulse but mostly repeats. I zoomed in and looked at what might be different when it didn't retrigger. I saw that the input signal +Storage Read at the output of a NAND gate rose for a very brief time right as the second timer in the chain emitted its short pulse. When the dip was 2V or less, there was no repeat, but if the dip dropped further, the chip fired again. 

Yellow - trigger, green output, purple second timer output

yellow - inverted trigger, blue output, pink RC node

INTRODUCED FILTER TO SWALLOW THE BRIEF DIP

I added an RC network between the +Storage Read signal coming from the cable and the logic circuits that fire the timers and control other devices on my board. The initial filter was set conservatively with a time constant of 4.7ns. 

It was working pretty reliably so I introduced another network between +Storage Write and the logic using that signal on my board. When I tested, a few times I didn't see the timer trigger at all during a write. I also saw the read timer begin to retrigger from time to time. 

Tomorrow I will make the RC time constant bigger to see whether this quenches the retriggers. Will also dig even further into the behavior of the timer chip - both the first read timer and the first write timer - where the retrigger occurs. 

What I noticed is that the retrigger happens on the first of two timers in each chain, but not on the second. That is, the circa 100ns pulse emitted by the second of a chain does NOT retrigger while the circa 800ns first timer output is where the retrigger occurs. This further bolsters the idea that the issue lies in the trigger signal to the first timer. 



2 comments:

  1. I wonder if it might be helpful to put a scope probe on +Storage Read at the earliest possible point where it is generated in the 1130 and compare that to what it looks like at your new PCB. Perhaps that might suggest something.

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    1. I did this earlier and saw noise at the origination point when my board was connected, but no noise when the cable T3 was pulled from my board.

      The noise is right in the middle of the signal, when the second timer chip is driving its pulse, not on the rising or falling edges. This is why I turned my attention back to the board.

      I will do a more comprehensive view of the signal as it moves from origination gate through the 1130 to the timer chip trigger.

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