CORRECTED FOR BAD FOOTPRINT FOR THE FPGA DAUGHTER CARD
As previously discussed, the position of pins segments J3 and J4 were swapped on the footprint, leading to several problems. Most serious was swapping +5V and ground power inputs, but we also had signals routed to different pins than were expected in the FPGA code.
BODGE WIRING
I swapped the power lines and also connected jumper wires from pins where the FPGA had analog inputs to other pins that were suitable for digital output.
CONVERTED FPGA CODE
I adjusted to code to use the pins to which the traces are currently connected rather than the ones I intended, which allows me to use the board now.


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