Very sporadic parity errors - need to capture evidence to find and fix

TYPEWRITER DIAGNOSTIC RANDOM PARITY ERROR WITH BIT 10 FALSELY DETECTED

I snapped a picture of a parity error stop that popped up randomly while the typewriter diagnostic was running. The 1130 was fetching the next instruction to execute from location x0258, which you can see from the Storage Address Register (SAR) in row 2. The process of fetching the instruction causes the Instruction Address Register (IAR) in row 1 to be bumped up by 1, which is why it shows x0259. 

The data read from memory is in the third row, the Storage Buffer Register (SBR), with xC220 showing. Looking at the listing for the diagnostic monitor running the typewriter diagnostic, at location x0258 is a LD 2,0 instruction - load from the address in index register 2 plus a displacement of 0. This would be xC200 but we have bit 10 turned on incorrectly. 

Each half of the memory word has its own parity bit which is set so that the total number of 1 bits in the half of a word plus that parity bit must be an odd number (odd parity). The left half has bits 0, 1 and 6 turned on, an odd number, so parity bit P1 is off (middle section of the display panel). The right side shows bit 10 on (the error) which would be an odd number of 1 bits put the parity bit P2 is set - triggering the parity stop. 

When the data in that location was originally being written as xC200 the right halfword had no bits set thus it needed parity bit P2 set to achieve an odd total. Somehow the data read back had bit 10 also set to 1. This could happen in the write or during the read. Alternatively, something else can inject a 1 bit at the time that the read is occurring in spite of the data from memory bit 10 coming back as 0.  

When originally written, the parity bit P2 is set but some error in the core memory might stick in a 1 in bit 10, because bit 10 is not inhibited to store a 0 value.  Core memory cycles always have a read phase followed by a write phase. Any bit that has a 1 value will cause a sense pulse during the read.

DETAILS OF THE MEMORY AND SBR CIRCUITRY

During read, all cores in the word are flipped to zero and any that had previously been set to 1 cause a pulse to come out of the sense amplifiers and into the SBR register. During write, any bit that should remain a 0 has a current passed through the inhibit wire, otherwise it will be flipped to 1 during the write phase. 

Failures in the inhibit or sensing function of core memory might cause the random false 1 bit to appear. 

Parity checking and setting are done with the SBR register. The SBR is the source of data for the inhibit wires during a write phase. It is the destination for sense pulses during a read phase. 

In addition, the structure of the SBR register circuitry has a number of pulses that could set bit 10 to a 1 value. These include transfers from the IAR register, from input output devices during XIO instructions, from the Accumulator (ACC) register during address computations, and the sense pulses coming for a read phase in core memory. A possible failure would be no sense pulse but one of the other pulses incorrectly arriving to set the SBR bit 10 to 1. 

SETTING UP A LOGIC ANALYZER TO CAPTURE AND FREEZE AT A PARITY STOP

I chose to use my DS Logic USB based logic analyzer to try to capture the cause of bit 10 being incorrectly set to 1. I only have 16 channels on the device so I can't record all relevant information - contents of the full 16 bit SBR, the 13 bits of the SAR that address the 8K of memory, as well as the pulses going into the SBR to set any of the 16 bits. 

I therefore will hope that these sporadic errors are always a falsely hot bit 10 and set up the signals to determine when/how that is occurring. I will monitor the parity stop flipflop and trigger the analyzer to stop when it is set. The trigger will be placed at the end of the buffer so that I can watch the signals that led up to the error. 

The IBM 1130 uses many asynchronous pulses, not aligned with the clock edges, which includes the sense pulses and the various pulses that set the SBR. I thus can't use a traditional logic analyzer mode that records the state only at a common clock edge. Fortunately the DS Logic analyzer can record such unclocked signals. It can also deal with the 0 and +3V signal levels of an 1130 system. 

IBM 1130 typewriter (console printer) repair and adjustment - part 12 - completed!

FREEING UP THE CYLINDERS ON THE SCREW LINKS

I pulled out my Nye clock oil and applied it to the screw link and hollow metal cylinder around it that was binding on certain tab and carrier return solenoid activations. After moving the cylinder and link by hand many times, I ensured that everything was moving freely as it should.

RERUNNING DIAGNOSTIC AND SEEING PROPER BEHAVIOR ON THE TESTS

I ran the diagnostics to get a complete clean run as a proof that the console printer (typewriter) is working properly.

I was happy with the results and could consider the typewriter to be back to operating condition. 

REINSTALL IN THE MACHINE

I had to remove the front panel of the typewriter to reattach the CES (console entry switches) subassembly. The front panel was then placed back on the typewriter and all the covers put back in place. This involves detaching and reattaching the tab set/clear pushrod. 

The signal and power lines run through one heavy cable that I had to route down through the machine as I sat the typewriter on its stand atop the 1130. The cables were re-plugged into the SMS signal and power connector blocks.

You can see the heavy grey cable wrapped around the usage meter block and then routed downward towards the SMS connectors. I then put the bottom cover on the typewriter in preparation for its placement back on the 1130 system. 

Ready to reinstall

The typewriter was nestled back in its normal position, below the console light display pedestal and behind the keyboard. A quick check showed that the typewriter was working. 

I can now get back to my Virtual 2315 Cartridge Facility checkout, because I can see the output of the diagnostic programs on the console printer. 

IBM 1130 typewriter (console printer) repair and adjustment - part 11

TEST AGAIN WITH DIAGNOSTIC

I loaded the console printer/keyboard diagnostic into core memory and began its execution. This runs through several routines to test the printer as long as the Console/Keyboard switch on the 1130 console is set to Console. It prints each in black first, then in red:

• Carrier Return typed at left and Tabulate typed at a selected tab stop
• shifted to lower case and typed all 44 characters
• shifted to upper case and typed all 44 characters
• printed one row first typing +, then backspacing and printing a 0
• tabbed to the stop, backspaceed, then printed BACK SPACE
• printed INDEX by tabbing and typing one character per line for form vertical word
• returned, typed CARRIER RETURN, then spaced to activate the automatic return at end of line
• for each rotary position (column of the typeball), printed the row in sequence from tilt 0 to tilt 3
• for each row of the ball, printed all 11 characters in sequence from -5 to +5
• printed characters selected to have maximum change in tilt and rotate between each letter

The goal is to have the output appear as below (other than seeing black and red color):

OBSERVATIONS OF THE DIAGNOSTIC OUTPUT

The diagnostic expects a single tab to be set at column 40 to achieve the output shown above. The instructions from my copy of the diagnostics manuals asserts column 20 instead. 

The output of most of the tests was perfect, but I did see a couple of cases where movement functions didn't trigger properly. 

In the test segments above, the lower case side of the typeball missed a carrier return before it printed the row in red ink. It then successfully did the following test,  typing 0 and asterisks in a pattern involving spacing and backspacing, which stresses the alignment of the carrier rack and precision of the space and backspace movements. However, the next test, which should have proved out line feed and backspacing, failed. 

The failure was the lack of the initial tab movement, after which it should have backspaced, typed E, backspaced twice, typed C, backspaced another two times and typed A, and so forth, to spell out BACKSPACE in reverse from the column where the tab stopped. Similarly, it should have tabbed and did a line feed before typing each letter in INDEX. 

I reran the test but tried to hit the TAB button on the front of the typewriter to force it to take place. I didn't get it perfectly but you can see that I got part of BACK SPACE to print showing how it should look if tab had occurred. 

The remaining tests all worked properly - proving out the automatic carrier return/line feed when the carrier passes the end of line setting, then printing characters in three stressful patterns termed rock, roll and twist. It provides that character selection when typing is working right even in the most difficult circumstances. 

SUSPECTING STALE LUBRICATION IS CAUSING THE SPORADIC TAB AND CR FAILURES

When I first freed up the tab function, I had to manually rotate the hollow metal cylinder that should move freely on the screw link between the armature and the tightening nut. It worked properly for a while and then failed again during the backspace/index test. 

I had flushed out the old lubricants during the entire restoration to get the typewriter working properly. The oil turned to gum plus it absorbed dust to further solidify. I had to use extremely thin clock oil to seep under the solidified stale lubricant then move each part to get it freely moving. 

I suspect that stale lubricant in the hollow shaft of the metal cylinders is causing sporadic binding. I will have to carefully flush these out to make them slide up and down without resistance. 

Scope on typewriter feedback signals to verify timings and adjustments of the typewriter

BACK AFTER EXTENDED ROAD TRIP

I have been away from the shop for two weeks while my wife and I visited relatives and friends in Myrtle Beach South Carolina and Wilmington North Carolina. Along the way we spent a few days visiting Savannah Georgia for sightseeing. A quick jaunt to Raleigh North Carolina to visit a bar famous for elaborate Bloody Mary drinks rounded out the journey. 

UNUSUAL DIAGNOSTIC CODE RAISED QUESTION ON TIMING

The new version of the typewriter diagnostic combines more than one movement command for the typewriter into a single output instruction (XIO Write), something that isn't discussed in any of the 1130 system manuals or that I have found in any other programs. This combined movement might result in a momentary rising edge on the -Twr CB Response signal before it drops again until all movements were complete. It might cause a falling edge on the +Twr CrLfT Interlock signal in the midst of an operation. If either happens, the edge would trigger a premature completion of the operation, allowing a new XIO Write to be issued while the mechanisms in the typewriter are still in motion.  

FEEDBACK SIGNALS ON THE TYPEWRITER

The two feedback signals are implemented with strings of microswitches. Some movements, such as spacing or backspacing, activate a single switch. Carrier return and tab movements are not only long operations, but vary in duration based on how many columns are traversed. Therefore, each of those two types have a pair of microswitches that overlap to cover the entire duration of the movement. If the pair of microswitches are not properly adjusted, they might open a brief interval where movement appears to have completed, leading to issues when a program issues a new XIO Write prematurely. 

The -Twr CB Response signal is formed with three microswitches in series. One covers the Space/Backspace/Tab operational clutch, the other two cover typing one character and shifting between upper and lower case hemispheres of the typeball. When any activates, the signal drops to 0 and then rises back to +48V when the switch closes. 

The +Twr CrLfT Interlock signal is formed by four microswitches in parallel. It rises to +12V when any switch is activated and drops back to 0 when none of them is turned on. One switch covers the 360 degree rotation of the CR/Index operational clutch, during the time that this either latches up a carrier return or moves the platen in a line feed. Another switch covers the latching of the tab movement during the 180 degree rotation of the Space/Backspace/Tab operational clutch. A third switch is on the latched carrier return mechanism, so that from the time it begins moving leftward until the latch is released by striking the left margin, the switch is active. Finally, a switch covers the movement part of a tab. Tab movement continues for a variable number of columns, between the start point and the next set tab stop, so it has a microswitch that turns on as the carrier begins to slide rightward and turns off when it comes to a stop.

INVOLVEMENT OF SWITCHES IN MOVEMENTS

With the paired commands, there can have more than two switches involved. For example, if a backspace is combined with a carrier return, three switches participate and both signals send status. With a simple operation like typing a character, only the -Twr CB Response will be involved.  

Since Carrier Return (CR) movement continues depending on how many columns it has to pass while moving, two microswitches control the +Twr CrLfT Interlock signal.  The reason that a CR has a pair of microswitches is that we have one mechanism that is busy during the 360 degree rotation of the CR/Index operational clutch, which is the time needed to latch up the CR mechanism and then the second switch is active until the latch is released. 

 The reason that Tab has a pair of microswitches is that we have one mechanism that is busy during the 180 degree rotation of the Space/Backspace/Tab operational clutch. That covers the time needed to latch the pawls out of the way so the carrier can slide rightward. The latch of the pawls sets the second microswitch, so that it is only when the latch is released by banging into the set tab stop that we turn off that switch. 

There is a switch on the Space/Backspace/Tab operational clutch, which participates in the -Twr CB Response signal, but another microswitch on the linkage that sets the tab latch. The second switch participates in the +Twr CrLfT Interlock signal. Thus during a Tab, both signals are active but start and stop at different times with some overlap. No other operation on the typewriter affects both signals - they activate one or the other depending on the operation type. 

SCOPE OBSERVATIONS

I set up a manual XIO Write instruction to trigger the different movement commands, both individually and in the combinations seen in the diagnostic code. For each I observed the feedback signals on the oscilloscope. I compared those to the expected signal shape for each operation to identify where there are any switches that are maladjusted. 

I found that the individual write commands were working as expected for most movement types, but that the tab and space movements were not activating on the typewriter. The feedback signals were correct for all the working movement types. I didn't initially try the combined movements from the diagnostic as I wanted to get the individual types all working correctly before doing any combinations. 

The yellow trace is the XIO Write to the typewriter of a carrier return movement, the blue trace is the busy condition signal and the purple trace is the +Twr CrLfT Interlock signal showing that the return movement is underway. By comparison, an XIO Write for a tab or space showed busy but neither the purple +Twr CrLfT Interlock nor the green -Twr CB Response signals move at all since no motion took place. 

INVESTIGATING FAILURE OF TAB AND SPACE COMMANDS

The circuits from the 1130 controller logic to the typewriter solenoids were observed. Each will be at +48V until the relevant XIO Write value pulls a solenoid line to ground. This should cause it to pull down on a trigger and activate the typewriter movement function. 

I saw the lines pulled to ground for both of the solenoids, yet the movement didn't trigger. One other thing I noticed was the duration of the grounded line to the solenoid was longer than the working solenoids such as carrier return. Of course, the feedback signals didn't change since the typewriter mechanism was not triggered to perform the tab or space. The difference in duration may be caused by the feedback signal arrival which might terminate the solenoid action; no feedback thus no termination. 

CHECKING OUT SOLENOID ACTION FOR SPACE AND TAB

I set up to watch the solenoids when I attempted to write a command to tab or space. I want to find the cause of the failure to trigger the movements. There are several possible causes, with the resolution depending on exactly why the motion is not triggered.

The movement starts with a trigger that releases the left operational clutch which rotates 180 degrees before latching back to a stop. The left clutch powers the space, tab and backspace movement functions. A right 360 degree clutch powers carrier return and line feed movements. 

The release of the clutch to allow it to turn is due to a trigger lever. 

The left operational clutch has three trigger levers, one each for tab, space and backspace. These trigger levers can be moved by two different types of mechanisms - pushbuttons and solenoids. On an ordinary Selectric typewriter, a third mechanism based on keylevers is used instead. The pushbutton on the front of the console printer is connected via a cable to trip the trigger.

The trigger is also pulled down to activate the clutch by the operation of a solenoid. When it is energized, the armature pulls down on a screw link that moves the trigger. 

Thus, the failure of the tab and the space triggers to activate the left operational clutch could be caused by several causes. The solenoid might be mechanically jammed and thus not move its armature down. The screw link might not move the trigger down far enough to cause the operational clutch to release. The cable from the pushbutton might be holding the trigger up so that the solenoids pull doesn't result in enough trigger movement to trip the clutch. 

We know that the pushbuttons are triggering the tab and the space functions. We know that the backspace command from an XIO Write will trip the clutch and cause a backspace. What is failing is XIO write to request tab or space. I therefore watched to see what the solenoid activation did on this machine. Did the armature move? Did the screw link pull the trigger down? Is the cable from the pushbuttons stopping the trigger from moving down to trip the clutch?

ADJUSTMENTS MADE TO CORRECT THE ANOMALIES

Having found the root cause, I worked on a fix. It was important that both pushbuttons and solenoids worked for the two movements in question - tab and space - so I had some checking to do after each change. 

The magnet unit above supports tab, backspace and line feed at the top row, space and carrier return at the bottom row. The armatures are arranged to form a line across the middle, with screw links up to the triggers for the tab, space, backspace, carrier return and line feed in that order left to right.

The screw links were adjusted to allow the armature to start moving before it pulled on the trigger yet move far enough to ensure it did trigger. That worked for the space function but I still had issues with the tab. 

The screw link passes through a hole in the armature, then there is a metal cylinder under the armature and surrounding the screw link. Finally a nut at the bottom adjusts the length of the screw link. The metal cylinder has a gap on each side - armature and nut - which allows the armature to get up to speed before it starts pulling down on the screw link .

I adjusted the screw links for the two solenoids that were malfunctioning until they seemed to be reliably triggering. I did find interactions with the pushbuttons, so that I had to reset those adjustments with the front panel in place on the typewriter. 

Finished checking and fixing up the diagnostic load file

FOUND ALL THE DIFFERENCES TO THE LISTING

I ended up with quite a few words that didn't match, although most of them are consistently different because of some corrupted test sequences towards the end of the code. Since the test sequences were a bit longer the address of data at the end of the program shifted, thus any instructions that referenced these locations did not agree with the listing. 

In addition to all the differences based on the shifted locations near the end, there was a single word that was incorrect - the value that caused our spurious error message. However, it was not just a matter of shifted locations for everything else. Some of the test sequences to be typed were alternatives to the code I discovered but seemed like it would accomplish the same purpose.

ALTERNATIVE TYPING SEQUENCES

The first deviations in test sequences began in the middle of the Backspace and Index test. This test begins by issuing a tab, then types backspace in reverse backing up from the tab column, then does a tab and types index with a line feed and backspace between each character so that it appears vertically on the page. 

The code I have in the file issues a character code that combines more than one control function in the same character, which isn't defined as valid in the programming documentation. Every control function has the low order bit set to 1. The other bits define which control function:

• 81 - carriage return
• 41 - tab
• 21 - space
• 11 - backspace
• 09 - shift to black
• 05 - shift to red
• 03 - line feed

Note that the functions above are a single bit set plus the low order one. My listing for the diagnostic accomplishes the index part of the Backspace and Index test by issuing an 11 then an 03, to backspace then linefeed. The load file has a single control character 13, which seems to combine the backspace and the line feed into a single command. 

Because the load file combines these commands, it is shorter by three words. That displaces all the sequences that follow (Auto Carrier Return, Rock, Roll and Twist) plus all the data and code that follows the sequences. One word was added to a data table, which consumes one of the three words that was gained by compressing pairs of movement commands into a single hybrid command such as line feed plus backspace. 

CORRECTED LOAD FILE FOR SINGLE CORRUPTED WORD

Since the typing sequences and related address shifting appear to be an intentional update made by IBM in order to fit a change in the same diagnostic test footprint, the only difference that seemed to matter was the constant for the desired Device Status Word (DSW). After the typewriter is commanded to type a character with an XIO Write instruction, while the mechanical operation is underway but before it completes. an XIO Sense Device should return a DSW that has both the busy and not ready bits set. The constant should have had both bits turned on, but it instead only had a bit for busy status. 

NEXT STEPS

With the file corrected, when I next arrive at the workshop I should be able to run the diagnostic without receiving the false error messages that were caused by the corrupted constant. I have some things to do that will delay my next visit to the shop, but once I am able to return I will load the fixed file and try out the typewriter.

I do have questions about the unorthodox combination commands that mix more than one movement command in the same XIO Write instruction. The reason I want to look closer is because the controller logic is sensitive to two feedback signals coming from the typewriter, which are -Twr CB Response and +Twr CrLfT Interlock, both of which are produced by multiple microswitches. 

Two of the typewriter movements, tab and carrier return, are variable duration events which depend upon pairs of microswitches to properly cover the entire duration. If the adjustments aren't correct, we could see a spurious edge on the signal that convinces the controller logic that the movement is complete even though the signal goes back to busy for additional time. 

I will put the oscilloscope on the two feedback signals and watch what occurs with the combination movement commands, hand coding an XIO Write to trigger the movement. If anything looks wonky, I will know the microswitch(es) to check and readjust. 

More on the errors with the console printer (typewriter) diagnostic

USED SCOPE TO VERIFY THAT NOT READY AND BUSY ARE PRESENT

I could clearly see that when an XIO Write was issued to the typewriter, both Busy and Not Ready activated at the same time and for the appropriate duration. I traced the Not Ready signal to every location in the machine just to satisfy myself there was no issue with the DSW. 

RAN DIAGNOSTIC AGAIN, THE SAVED DSW WAS CORRECT BUT ERROR PRINTED

Indeed, after an XIO Sense Device the Accumulator (ACC) had bits 3, 4 and 5 set, which stand for Console/KB switch set to Console, typewriter busy, and typewriter not ready, respectively. This is correct. 

The diagnostic printed error E0402 which indicated that our status was not correct. The text in the documentation suggests that the busy status was wrong, but it was just poorly worded. Nor was the Not Ready status wrong - as we just verified. The error message should not have been printed. 

STEPPING THROUGH TESTING CODE, I FOUND A CONSTANT WAS INCORRECT

The code involved in this producing this error message had immediately issued an XIO Sense Device after it did an XIO Write to type a character. I saw it apply some bit manipulation then check to see that the saved DSW matched the archetype for a correct status. However, the word with the archetype status, which should have held x0C00, was instead 0x0800. This was triggering the spurious error message. 

I did a quick update of that word to the proper value, reran the diagnostic and, miracle of miracles, the error message was no longer emitted. However, if there was one corrupted value, there may be more. 

COMPARING DIAGNOSTIC ASSEMBLY LISTING AGAINST CORE FILE

I began to check the value of each word in the file I load into core to run the diagnostic, comparing it to the printed listing of the diagnostic program. This is time consuming. So far, I have found the one error word that caused the erroneous error message, but also see that the address of one routine near the end of the listing is off by two words. However, every other word so far has matched perfectly. 

As I finish the cross check, I can clean up my diagnostic program file so that it will be loaded exactly as intended by the authors at IBM and therefore should run flawlessly. 

Substitute relay arrived for 2501 card reader, tested and installed

RELAY R3 HAD AN OPEN COIL THUS REPLACEMENT NEEDED

The power supply box includes a function to keep the main motor of the card reader running for 15 seconds after the 2501 receives its last read or feed request via an -execute command signal. Relay R3 latches every time -execute command arrives but the voltage across the coil declines based on an RC circuit until about 15 seconds have elapsed, when the relay coil is no longer able to hold the connection. 

The contacts of relay R3 send a signal -motor hold sw back to the 1130 system's controller logic, which uses it to maintain or drop the -motor relay command back to the reader. If this isn't working, the motor will shut off instantly after every card is read, which is hard on the motor and disruptive to the process of reading. 

EXACT PART NOT AVAILABLE BUT LOCATED A RELAY THAT SHOULD WORK PROPERLY

The Sigma part number did not come up in any online search, but there were many similar relays from Sigma that I could choose from. I looked for the critical specifications to get as close to the original relay as possible. This included the voltage and current rating of the contacts, the voltage for the coil, the DC resistance of the coil and factors like the drop out voltage. 

The original relay had contacts rated for 2A of current, but that is extremely far above the actual signal currents used in the 2501 and 1130 system. Thus, a 1A part was very suitable. The voltages for the contact, coil, and coil drop out were identical. The resistance of the original relay was 10K but the part I found was 9K. 

The final difference was the mounting method - the hole locations and shape of the mounting foot. I will have to adjust for the difference to install this new relay into the power supply box. 

CONNECTED AND TESTED ON THE WORKBENCH

I connected the power supply box to my 220V step up transformer and used some resistors and jumpers to simulate the control signal -execute command to trigger R3. My VOM was hooked across the contacts of the new relay to let me hear the duration of the relay actuation. The circuitry around the relay includes a potentiometer where I can fine tune the time duration, which should help me compensate for any differences due to the substitute relay.

The relay activated cleanly when the control signal was given. The relay opened up after 5.5 seconds. Based on that, I began adjusting the potentiometer but the max delay I could achieve was around 7 seconds. 

I experimented changing the resistance of the time adjustment leg - the potentiometer plus a 10K resistor - to see if I could lengthen the hold. Even with an infinite resistance, the relay held for 13 to 16 seconds, varying a bit, which I deemed close enough to proceed. The specification for motor hold time is 15 seconds +/- 3, therefore we are within the proper range. 

The potentiometer and related resistor are out of the circuit. The relay coil appears to be draining power faster than the original did, or it has a higher drop out voltage, or both. An alternative solution would be a larger capacitor in the timing circuit, which would accommodate the higher current flow and lower its voltage at a slower rate. However, since the unit performs adequately now, I won't pursue this alternative.

MODIFIED MOUNTING METHOD TO INSTALL INTO POWER SUPPLY BOX

The original relay had a rectangular plate on the back with holes near the top and bottom. The new relay has a different shape and hole pattern, thus I had to take off the plate from the old relay, drill out a hole and use a screw to attach the new relay to the plate. 

READY TO PUT POWER SUPPLY BOX BACK INTO 2501 CARD READER

The lower compartment of the 2501 card reader holds the power supply box, a card cage for the SLT circuits and the connectors used to connect cables to the 1130 system. The power supply box fits in the compartment using slots in the box that match mounting hardware in the 2501.

A flat rail runs across the top of the compartment, from front to back. Slots in the top of the power supply box allow it to fit over the rail, with enough room in the slot to move further upward than its final mounting position. 

That permits the bottom of the power supply box to be swung over the top of a rectangular rail that sits across the bottom of the compartment, running from front to back. Square cutouts on the bottom of the power supply box allow the box to settle down onto the rail. This suspends the box from moving side to side in the 2501. A bolt goes through the bottom of the power supply box to lock it down in position on the bottom of the 2501 compartment. 

Once I do this I will be reconnecting all the cables and wires I had to disconnect in order to move the power supply box to the bench for testing and repair. 

Oops - error in test code thus troubleshooting the wrong problem

MY HAND CODE TO TEST THE DSW AND SAVE IT WAS DEFECTIVE

The error messages from the diagnostic were described as indicating the failure of the typewriter to appear busy during an output operation. The hand code was intended to save the Device Status Word (DSW) immediately after a character was output, with the result saved matching the character code of the letter I typed rather than a valid status.

Based on that I was down a rabbit hole trying to imagine a failure scenario that would place the character code in the accumulator register (ACC) after a sense DSW. It was quite unlikely which meant that I didn't have a good starting point to test signals to eventually locate a fault. 

Imagine my embarrassment when I began to execute the code in single cycle mode to see exactly how the XIO Sense Device was working. I noticed that I was saving the ACC at the wrong time, just after I typed the letter with XIO Write, not after the XIO Sense Device. Thus the value I saved was in fact reasonable and consistent. Unfortunately, it was not an indication of what might be wrong in the diagnostic!

ACTUAL ERROR DISCOVERED BY LOOKING AT DIAGNOSTIC MEMORY LOCATIONS

I pulled out the listing of the diagnostic program and found the point where it was writing the error message. The code showed me a location where the DSW had been saved before it was checked doing an exclusive OR with the value x0C00 and requiring the result to be all zeroes. Those two bits in the DSW are busy and not ready, respectively. 

The busy bit was on, as it should. The not ready bit was not set. My DSW was x0800 but had to match x0C00 for the test to pass.

NOT READY SHOULD GO ON AT THE SAME TIME AS BUSY

The architecture of the IBM 1130 specifies that the not ready bit is turned on by multiple things, one of which is a busy condition. It is also set when the typewriter is out of paper (Forms Check lamp is lit on the 1130 console). In the past this had worked properly, so the diagnostic error was new, popping up sometime while I was doing the last round of typewriter adjustments. 

Since it had occurred immediately after I changed things on the typewriter device, the likely cause was something wrong in the typewriter itself. Once I watched the typewriter perform properly I turned my attention to the typewriter controller logic inside the IBM 1130. Sadly I read the error as indicating that the busy bit was not turning on. This bit turns off once the operation is complete and the controller logic requests an interrupt from the processor. 

I then set up a defective program to look at the DSW to check for busy right after the XIO Write but before the interrupt was requested. Based on a flawed test, I was chasing a false error scenario in the controller logic. Armed with the actual situation that triggers the error message in the diagnostic, I can start testing the portion of the 1130 that is involved. 

NOT READY STATUS LOGIC

There is a small amount of logic and connections involved in turning on not ready while the typewriter is busy. This all begins when the typewriter turns on its busy flipflop, during the XIO Write instruction, step E1, at clock time T6. That signal stays on until the rising edge of the -Twr CB Response signal from the typewriter. 

At this time, the busy flipflop is turned off and the operation complete flipflop is turned on. The request for an interrupt on level 4 is raised whenever operation complete is set. A subsequent XIO Sense Device with bit 15 set will clear the operation complete flipflop, stopping the request for an interrupt. This normally is issued within the interrupt request handler code so that when the interrupt handler exits, we don't immediately jump back in due to the active request. 

-Twr CB Response is created by a chain of microswitches in the typewriter, all of which are normally closed. When one or more of them opens, indicating that a mechanical operation is in a sensitive portion of its cycle, the signal drops to logic 0. Once that protected portion of a cycle is finished the switch closes again, creating the rising edge back to logic 1 state. 

Since we are receiving the interrupt request we know that the rising edge is detected. We know from looking at the DSW after the interrupt that the busy bit is not on. I know from the stored DSW in the diagnostic that the busy bit was set while the typewriter was outputting the chosen character. 

The signal -Twr Not Ready is generated by the logic below:

As you can see, it is very simple. On the left, the End of Forms microswitch is debounced and is an inverted logic signal -Twr End of Forms. The -Twr Busy signal is also inverted. 

If both of them are logic high, thus we are not busy and we don't have an end of forms, then the signal +Twr Not Ready is generated as logic low due to the rules of a NAND gate. If either condition is true (logic low) then we raise the +Twr Not Ready signal that goes over to produce the DSW bit 4. 

Also, if we have a logic high on this generated +Twr Not Ready signal and at the same time we are not busy (logic high on -Twr Busy) then we drive the -Twr Forms Check Lamp line low to light the bulb. This means that the lamp doesn't actually go on while we are performing a typewriter mechanical operation, waiting until the completion. 

For example, if the carrier is near the right margin and a carrier return is requested, when the platen rolls up one line, we might have the paper end leave the End of Forms microswitch. The lamp doesn't turn on until the carrier has finished its move to the left margin. Presumably an eagle eye could spot that sequence of operations, but it seems to be a unnecessarily sophisticated implementation of a warning lamp. 

Finally the signal -Twr Busy that we are combining to produce the -Twr Not Ready condition comes from this logic:

The Twr Cycle flipflop is turned on by the combination of XIO Write, Area 1 (typewriter address) and time T6, as long as the typewriter is not busy. The busy signal arms the edge detector which fires off a set pulse when we exit T6 in an XIO Write to the typewriter. The flipflop is turned off when the signal +Twr Interlock Latch drops as long as we are not in a shift cycle, since shift cycle conditions the edge trigger. 

When the typewriter needs to shift between the upper case and lower case hemispheres of the typeball, it converts the request into a sequence of two typewriter actions. First, a shift is fired off. When that is complete, we then fire off the character type command. 

The interlock latch is on while mechanical action is underway and will turn off after the shift and again after the typing of a character. We don't want to turn off the print cycle after the shift, only when the actual typing is done. 

Our busy condition is formed with a NAND gate, turning on if any of three signals are true:

• Twr cycle flipflop is set
• We detected the end of line microswitch on the typewriter
• The interlock latch is on due to mechanical motion

Since this output is an inverted logic signal, -Twr Busy, it is logic low when on. That feeds directly to the logic producing the +Twr Not Ready signal (see diagram). 

Now that we see how the two signals, -Twr Busy and +Twr Not Ready, are produced, we look at the logic which presents +Twr Not Ready as bit 5 of the DSW.

When we have an XIO Sense Device for Area 1 and the +Twr Not Ready signal all at logic high, we set DSW bit 5 low (which produces a 1 in the DSW). 

All of the logic involved is on gate A, compartment C1 of the 1130, which eliminates any compartment to compartment cables from suspicion. We have just a few gates that might be malfunctioning. The only other possibility is a broken trace on the backplane of compartment C1, which is very unlikely. 

Potential bad gates include:

• A C1 C2 D07 output producing the -DSW Bit 5
• A C1 E5 D04 producing +Twr Not Ready

The correct operation of the logic producing the interrupt request and good status for busy eliminates any other gates in the machine from consideration. 

OSCILLOSCOPE PROBE OF HAND CODE TO WATCH NOT READY SIGNAL

This is a very simple test - trigger the scope when the busy condition is produced at A C1 D4 D04, on the falling edge. Watch the two signals above to see if they are generated appropriately. Based on that, test the gate in question, find the bad component and then fix it. 

Debugging issue with XIO Sense DSW - part 2

GATING ONE REGISTER TO ANOTHER IS A BIT COMPLICATED

The terminology suggests that you will get an exact copy of the source register in the destination register, but the reality of the circuitry is important to understand. Gating into a register involves IBM's edge sensitive gates, which produce a pulse to set a flipflop for the bit. This pulse sets the flipflop. It does not reset it. The contents of the source will not be turning off the flipflop of the destination. 

Further, the control signal that arms the edge sensitive gate is the bit value of the source. If the source holds a 0 value, then the edge sensitive gate is NOT armed and cannot set the flipflip. It is when the source holds a 1 value that the gate is armed and turns on the flipflop at the appropriate time. We transfer 1 values but not 0 values. 

This may sound like a quibble, but it means the entirely different circuits are involved in resetting the bits of the destination. This would be a register clear signal that turns all the flipflops to 0. Now imagine that the register previously held a value of x3C00 and it was not cleared. If the source holds 0x0800 when the gating occurs, the destination register remains at x3C00. If the source holds x00F0 then the destination register would become x3CF0. We are doing an OR into the destination, so that we absolutely must have it cleared to x0000 before we do the gating. 

ONE POTENTIAL FAILURE MECHANISM

If we first posit that a register has the typed character code at the end of the XIO Write instruction, and that nothing in the execution of the I1 and E1 steps of the XIO Sense DSW make use of that hypothetical register, then if the register clearing pulse does not get to the register, we might get the symptoms I observe where any bits from the typed character code remain on in the destination register. 

REVIEWING PATH OF DSW DATA FROM CONTROLLER TO ACCUMULATOR REGISTER

During execution of an XIO Sense DSW, at the start of the E2 step of execution, the typewriter controller logic turns on bits that should be a 1 in the DSW. It does not turn off any bits - again, the circuits in the 1130 generally are asymmetrical and flip bits on with edge sensitive gates. While the controller holds the desired bits at 1, pulling them to logic low since the IO Bus is inverted, an early step of E2 for the instruction gates the IO Bus to the B Bus. Assuming the B bus was cleared previously then it has 1 bits only in the positions that were set in the IO Bus.

A bit later in the E2 step of the instruction, it gates data from the B register to the D register. If the D register was previously cleared then it will match the B register value. A touch after the transfer, control lines are set to the arithmetic logical unit to cause the value in the D register to be transferred into the A (Accumulator) register. 

TRYING TO FIND A FAILURE MECHANISM THAT INVOLVES THE D REGISTER

We know that the B register updated after every memory access, so that the original typed character code from the XIO Write instruction is replaced, first by the XIO Sense DSW instruction itself, then by word 2 of the IOCC in step E1, and finally from gating of the IO Bus in step E2. 

However, fetching instructions and reading the IOCC does not involve the D and A registers, only the B register. Thus there is the potential that something has gone wrong with clearing one or both of them, so that when the IO Bus is gated into D we are just doing an OR of the IO bus with the prior contents of D. 

For this to happen, we must have the character code of the XIO Write instruction somehow get transferred to the D register. There is no need for this to happen as the XIO Write should simply have the data in the B register so the typewriter controller can work with. I must find evidence that a transfer takes place to D otherwise this explanation of the defect can't be correct. 

Looking at the logic of the machine, the data should stop at the B register because the CCC counter is decremented to 0 at the start of step E3 of the XIO Write instruction. The last thing in the D and A registers will be the first word of the IOCC as it was read in step E2. For this speculation to cause the symptoms we see, the transfer into D must happen in E3 of the XIO Write, through some kind of defect. Then, a second defect must suppress the clearing of register D so that when the XIO Sense DSW step E2 gates in the IO Bus, we get an OR with the prior contents of D.

I am skeptical that I would have two scattered defects that combine in this way but otherwise code seems to run fine on the 1130 system. I need a starting hypothesis to debug the machine, otherwise I might need to monitor hundreds of signals blindly to try to spot a problem. More thought is required. 

Debugging issue with XIO Sense DSW - part 1

BACKGROUND FOR UNDERSTANDING THE SENSE DSW ISSUE

The 1130 has a common input bus for I/O data as well as the device status words, with all the sources for a bit tied together so that any one of them can pull the line to ground to indicate a 1 value. This means that many circuits can be turning on those bits. 

When reading from a peripheral, the IO bus is gated into the B bus (memory data register or storage buffer register) at the correct time so that it is written back to the current memory word. DSW status bits are also gated to the B register in the same way. 

This means that the issue could also be occurring in the B register, but the IO bus value was correct. That is another avenue to chase down. In addition, there are other registers involved, which I will discuss below. 

The 1130 is a memory centric machine, with instruction execution involving one or more memory access cycles. An address is placed in the M register (Storage Address Register) before the cycle begins and the contents of memory are placed into the B register (Storage Data Register) in the midst of the cycle. If a new value is to be written into that memory location, the B register is changed before the second half of the storage cycle takes place.

The instructions themselves are in memory, thus before they can execute they must be read with a storage access. Each memory/storage access cycle is one of a number of defined types. I1 is what fetches the first word of an instruction, but we could need an additional storage cycle I2 if it is a doubleword instruction. 

The address of the target of the instruction must be determined and these might require storage access cycles themselves - IA for indirect addresses and IX if an index register is involved since those reside in memory at fixed addresses. 

Once all the preparation steps, at a minimum I1 but as much as four cycles I1, I2, IX and IA, then the purpose of the instruction can be satisfied by execution memory cycles. E1 is the first execution memory cycle, where a value might be fetched from memory or placed in memory. Some instructions may not access the memory, instead changing arithmetic or logical data, but that occurs using a storage cycle but setting a signal that suppresses access to the core memory during the cycle. 

We see the I register (Instruction Address Register) is moved into the M register before a cycle to cause the instruction's first word to be read into the B register. In the diagram above, a simple instruction has only the I1 cycle and then the E1 cycle to grab the value in the target memory location and place it in the B register. 

In the 1130, every memory access produces a value in the B register. When executing the XIO Write instruction, the last memory location we read is the address where the character we want to print is stored, thus B contains that value. When it then starts to execute the XIO Sense DSW (step I1), the first memory address read is the instruction word, which replaces the B register. The XIO step E1 then fetches the second word of the Input Output Control Command (IOCC) which has the device, IO function and sometimes control bits. Thus word 2 of the IOCC is in the B register. 

In step E2, the XIO fetches the first word of the IOCC which often is an address but for XIO Sense DSW the storage read is blocked and we instead just gate the IO bus to B register. The XIO Write, step E3, on the other hand, will fetch memory at the address we just picked up. For an XIO Sense Device, the value in the B register is then gated to the D (Arithmetic Factor Register AFR) and passed through to the A (Accumulator) register using a couple of arithmetic logical unit control signals. 

Somehow the value in the B register looks more like an XIO Write than an XIO Sense Device. However, the first word of the IOCC I used was not the address where the character value was stored, so it could NOT be actually reading it from memory like an XIO Write E3. 

The data that was in the B register multiple memory fetches ago is now showing up in the A register during the XIO Sense DSW step E2. While it looks as if the IO bus for the sense DSW stored the 'saved' value in B, it had no path to make that transfer happen. I think instead this has to do with the D and A registers. They would not be disturbed by the I1 and E1 stages of the XIO Sense DSW instruction execution, thus anything in them would remain there. 

The problem with this hypothesis is that the XIO Write should NOT be transferring the B register value to D or A. In order for the observed actions to take place, the XIO Write would have to transfer the B reg value somewhere else, which it shouldn't, then the XIO Sense Device would have to move something other than the IO bus value to B, D and A. 

Compare the XIO Write instruction, which is diagrammed above, with the XIO Sense DSW instruction diagrammed below. 

The E1 step of XIO Write will grab the second word of the IOCC and store it in the U register to determine which device and XIO function is being performed. The next storage cycle, E2, will grab the first word of the IOCC which contains the address in memory where the character data for typing is stored. That address moves to the M register and the E3 storage cycle causes the character value to be fetched into the B register. The typewriter controller logic looks at the value in the B register to determine how to control the typewriter. 

The E1 step of XIO Sense DSW also grabs word two of the IOCC, and another storage cycle takes place as E2. However, the storage access is blocked, nothing goes in or out of core memory. Instead, the typewriter controller logic sets bits to 1 in the IO bus and it is gated to move into the B register. Other signals than gate the movement of the B register to the D register (Arithmetic Factor Register) and control signals cause the value in D to move into the A register (Accumulator). All those gated moves happen during a storage cycle but no actual memory access occurs during that time. 

The address in the first word of the IOCC for XIO Sense DSW may be moved to the M register but it is ignored since we have inhibited memory access. The typewriter controller logic is only able to set some status bits in the IO bus. It is not able to write back the entire character value. This is the root of the problem - A register ends up with a value that is long since gone from the B register when XIO Sense DSW starts executing and the controller logic has no way to write it back even if it had it. 

IBM 1130 typewriter (console printer) repair and adjustment - part 10

USING SCOPE TO VERIFY BUSY CONDITION FROM TYPEWRITER

I could clearly see the -Twr CB Response signal drop during the typing of each character, although the console printer diagnostic as reporting that the DSW did not show the typewriter busy when it was sensed immediately after an XIO Write was executed. 

There could be a failure in the controller logic inside the 1130 system that is failing to indicate the busy condition. This is set when the XIO Write instruction is completing and cleared by the -Twr CB Response signal having gone low for a while and then returning to high. When the signal returns to high, besides turning off the busy signal it also requests an interrupt on IL4, presenting Operation Complete status.  

HAND CODE TO ISSUE XIO WRITE AND XIO SENSE DSW IMMEDIATELY AFTER

I set up the machine so that when the interrupt arrives on IL4 when the typing completes, the machine simply waits. Then, the code that fires off the character typing has a sense DSW immediately, stores it in a chosen memory location and at the end waits.

I could see that the Accumulator, as well as the chosen memory location, contained x3C00 which is not correct for what should be happening. This is why the diagnostic complained. I was suspicious because the value happened to match the character I asked to type - x3C is an A - so I altered the character I was typing to J (x7C) and that value was now returned for the  Sense DSW.

This should NOT happen.  This is not a typewriter issue, so I will blog about this under a new title and once it is resolved I can go back to documenting the console printer repair and adjustment. 

Wrapping up testing of 2501 card reader power supply box - one bad component discovered

INVESTIGATED THEORY ON HOW TRANSFORMER PRIMARIES ARE CONNECTED

My speculation on how the US transformer might be connected to the five terminals of terminal block PSTB1 was validated. I isolated windings and measured DC resistances. I removed the jumper between terminals 2 and 3 which did indicate there are two sets of primary windings, as I suspected. 

I altered the configuration to 230V, to match my workshop, and reverified the output voltages delivered. Since the transformer is ferro-resonant, thus crudely self regulating, the differences in the voltages produced were less than the delta from 208 to 230, but they did move in the correct direction. 

TESTING MOTOR CONTROL CIRCUITS

The motor is started by activation of the contactor relay K1, based on the signal -Motor Relay coming from the 1130 system controller logic. This works by grounding the input signal, thus powering the coil to switch on the contactor. I connected and disconnected ground to terminal 10 of PSTB2 where the signal arrives. The contactor clunked in and out based on the connection I made. A VOM confirmed the conductivity of the contacts when K1 was activated.  

As the power for the motor is applied via K1, it is connected to the normal winding of the motor. The starter relay K2 connects the start winding through an R-C link to shift the phase of the AC, sufficient to start rotation of the motor. Relay K2 has a time delay then switches off the start winding. I did not test this yet as I need to connect the motor first. The current draw of the motor starting is more than my bench 240V supply can deliver, thus I need to replace the PS box in the card reader and hook it up to the IBM 1130 in order to test the last piece - startup of the motor. 

Relay K3 is a time delay which delivers a signal back to the 1130 controller logic -Motor Hold that indicates that the motor should continue to be powered by asserting -Motor Relay. The relay is activated by relay K4, which switches on for each -Execute command from the 1130 controller logic. Execute is issued to feed or read a card. 

The relay K3 coil is provided with 24V from the brief activation of relay K4. The 24V charges a capacitor which continues to hold the coil activated but an RC network is draining the charge. The timing is set up so that the coil of K3 will drop out after about 15 seconds - as the voltage declines below some threshold. 

Thus, each time a card is read or fed, the hold relay activates for 15 seconds and causes the controller logic to hold K1 active so that the motor runs. During normal reading of a deck of cards, relay K4 resets the hold relay K3 repeatedly so that the motor is running continuously, but after any pause of 15 seconds the motor will stop. 

I tested relay K4 by connected terminal 9 of PSTB2 to ground, as this is where the -Motor Relay signal is connected. Each time I did the relay switched and the VOM indicated a good conductivity for the contacts. 

TESTING K3 FAILS

That would have also validated relay K3, as it will receive 24V every time K4 switches. I didn't see or hear the relay switching. I hooked the VOM to the contacts to see if it was working, but nothing changed. I then hooked up the VOM to the coil of relay K3 to see what voltages it was seeing.

It was presented with 24V when K4 activated and ebbed so that after 15 seconds it dropped to about 3V where K3 probably would have dropped out. However, no action and the voltage should have dropped across the terminals due to the current flowing through the coil.

I then used the VOM to test the resistance of the coil. Infinity! Open circuit. The wire entering the wrapped coil was good on each side, so the break is somewhere inside the coil of the relay. The part is a Sigma 41 F-98326 - a single pole dual throw relay with a 28V coil with the ability to switch 2A at up to 75VDC. 

This is excessive given it is just grounding a single line going into an SLT card in the 2501 card cage - it is pulled up to about about 20V when the relay is open and pulls that to ground when activated with just a few milliamps of current flow. Finding a substitute just has to support contact operation at milliamps of current with a voltage under 30V. 

LOOKING FOR REPLACEMENT RELAY

I partially disassembled the relay thinking that if I could find another Sigma relay with a 10K coil I could swap them. 

I checked eBay and did google searches, but nothing matched the exact relay. I can find many Sigma relays with similar specifications. There were plenty with contacts rated at 7.6VDC, 16VDC, or 22VDC but I need to have one at least 28V rated since it is looking at 24V or a bit more. 

The other issue is the resistance of the coil - which determines how much it drains the voltage on the capacitor in the time delay circuit. The schematic indicates this is a 10K ohm coil, however the relays I am finding on ebay are 1K or 2.5K typically. 

I found a Sigma relay with a slightly different form factor and current rating. This was also a 28VDC coil, 9000 ohms which will activate at 2.4 ma which is below the 24VDC level presented by the closing of relay K4. Thus it will activate and its current draw is only 11% higher than the nominal part. The contact is rated at only 1A but that is well above our maximum draw. 

It doesn't mount the same way, but I can work up a mounting method inside the PS box. I will buy this and verify it works properly when wired into the circuit. 

REMAINING TO TEST

I need to test the motor and its start relay K2, but that has to wait until the PS box is back inside the 2501 card reader cabinet. I feel pretty good about the condition of the PS box and the card reader. Once the time delay relay K3 is replaced I can move on with my testing. 

More on differences between US and European versions of 2501 card reader (model A1/A2) power supply

THE OBVIOUS FIRST

The mains voltage and frequency are different between the two geographies, which leads to the need to change the transformers and some attached components. Due to the magnetic saturation characteristics of the iron core in the transfer, the size and design varies based on frequency, with 50Hz transformers generally larger than their 60Hz counterpart. 

In the US, the mains frequency is 60Hz and the voltages one might encounter are 115V, 208V and 230V. Buildings whose supply is three phase would generally provide 208V as the phase to phase voltage, whereas single phase (residential style) utility connections provide 230V and 115V. 

In Europe, mains are more standardized at 220V but there is an acceptable range above and below, thus the need to adjust for mains voltage as low as 195V and voltages above 220V as well. 

The transformers IBM uses in their mainframes supported machines attached to all of the usual US voltage levels, thus they had taps for 115V, 208V and 230V which were configured during installation to match the building mains voltage. The transformers used in European machines generally had taps for 195V, 220V and 235V instead. 

CONFIGURING TRANSFORMERS DIFFER BASED ON REGION

Given the difference in the transformers installed in the machines between regions, the terminal blocks where the installer would configure the voltage change. Making this even more complicated, the transformers used by IBM might have more than a single multitapped primary winding. In that case, jumpers would connect parts of the two sets of windings so that the net magnetic drive was appropriate for the target voltage. 

Below is a transformer inside the IBM 1130 is wired for 115VAC input, along with the chart that describes the wiring needed to configure for 115, 208 or 220V.

Below this is the European equivalent of the same transformer in the IBM 1130, shown wired for 195V with its chart. 

This explains the wiring diagram for the European version of the 2501 model A2, which used terminals 1 to 4 on PSTB1 terminal block. Unfortunately, the actual connections show that it uses five terminals, similar to the US dual primary winding transformers, and couldn't just implement the chart just above for 115, 208 and 230.

SPECULATIVE WIRING OF US TRANSFORMER TO TERMINAL BLOCK PSTB1

My first guess at the connections of the transformer primary windings to terminals 1 to 5 is below. This matches the US transformer type from the US IBM 1130 and would be consistent with the jumper between terminals 2 and 3. 

In order to validate this guess and make a change to 220V, I will disconnect the terminals and measure resistance to try to verify (or disprove) the wiring concept. I will also look at where the line connections are made to see if that is consistent with my speculation and a 208V setting.