I should have some time to work on the VHDL tonight, waiting in the lounge for my flight to board and then on the aircraft flying home. I arrive home tomorrow evening just in time for the US Thanksgiving holiday and a few days with the 1130 before I fly off to the next venue.
SAC INTERFACE FOR ADDING PERIPHERALS TO THE 1130
I completed my logic for handling multiple devices simultaneously including prioritization of access to the cycle stealing function. I have a block of Unit Control Words (which is a term used in the 1130's era to set up devices on S/360 channels) in priority order with flags that control the use of cycle stealing and interrupts.
All the basic processor (software) initiated IO activities are handled, the seven types of IO commands that define the IOCC which an XIO instruction invokes. These are Sense ILSW, Sense DSW, Read, Write, Control, Initiate Read and Initiate Write.
One type is used during an interrupt handler routine to ask every device to raise its hand if it has a request to be serviced by this interrupt level. The devices have their assigned bit positions in the ILSW, so the result returned to the software has a logical OR of all the bits returned by various devices.
Another type is the Sense DSW which asks the specific addressed device for its status - receiving a word in the accumulator with assigned bit positions related to various status conditions. Another function of the Sense DSW command is to allow resetting of the condition that caused a request for interrupt - if the conditions aren't reset by turning on this bit, then when the interrupt handler exits it will immediately be reentered by the hardware.
Read and Write commands are a means to move one word between memory and a peripheral device. The sofware gives the memory address of the data as part of the IOCC.
Control is a command that is used to trigger various device actions, by setting or resetting various assigned bits in the IOCC. Examples include seeking the disk arm to a new cylinder or causing a printer to move down a line.
Initiate Read and Initiate Write are used with devices that leverage the cycle stealing capability of the 1130 - the XIO command provides an address of a memory area to the device, beginning with a word count and continuing with space to hold that many words of incoming or outgoing data. The Initiate commands end as soon as they pass on the word count address, with the device then using cycle stealing to fetch the word count and later to read or write words to the remaining area.
Cycle stealing is a mechanism where a device can request a special memory cycle where the device provides a memory address and either receives the contents of that location or provides data to be written into that location. There are certain constraints on when the memory cycle takes place but in general these can happen almost immediately as soon as the current memory cycle underway is complete.
Since some operations such as addition or shifting can take a variable number of basic clock cycles to complete, the wait for the cycle steal to be granted is variable. Further, a device on a higher priority cycle steal level will be serviced first, adding more possible delay. Since we are usually talking only a few microseconds wait, this is fast enough for all the peripherals used with the 1130.
The next major coding task for this device will be the protocol and link connecting the interface to a PC, allowing the PC to be the source or destination of data that will be 'read' or 'written' by the peripheral device we implement in the box. We can have a mix of real devices which are hooked to the box plus emulated devices which use the PC link.
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