I traced signal wires to the fpga board and cross checked against my rewiring notes to see why I have the few swapped/misplaced signals. I did find a swap in one of the two connectors on chip 4 and replaced it.
I put together a core memory load file to test out the address lines from the SAC box - for each address bit, I used an address with only that bit on, and stored the same value in the core location. When I displayed what was loaded, most were correct but I found that two address bits, A11 and A12, were swapped. At location 0x0010 I found 0x0008 and correspondingly at location 0x0008 the box had stored 0x0010.
I can as easily swap the assignments in the fpga rather than rewire the connector for the two address lines, so that doesn't need any change. The remaining two issues I found were a problem with data bit 5 and with interrupt request for level 4. The problem could be on either side of the driver board - the lines from the fpga or the twisted pairs that run to the 1131.
After some tracing, I discovered that I had swapped a couple of ribbon cable lines in top connector for chip 2. I repaired it which should restore B5 to correct operation. I swapped the sense of the two address lines for address bits 11 and 12. Loading core worked properly, allowing me to load up the standalone disk utility program DCIP and have its startup message type out on the console printer.
I still have something wrong with interrupt level 4, the remaining issue as far as I can tell. I monitored the fpga input pin for the IL4 request and see it steadily at logic level 0 even when I believe I am requesting the interrupt. This tells me I have a problem in the wiring. When I looked closer at the chip 5 bottom connector, I saw the problem.
I rewired the connector but even with good conductivity to the input for IL4 on the chip, I wasn't getting the level to trigger. Too, level 2 now no longer triggers. There is still a connectivity challenge here, even though the memory loading is now solid as a rock. I swapped the IC just in case there was a problem with the component, but no change. More on this tomorrow.
After some tracing, I discovered that I had swapped a couple of ribbon cable lines in top connector for chip 2. I repaired it which should restore B5 to correct operation. I swapped the sense of the two address lines for address bits 11 and 12. Loading core worked properly, allowing me to load up the standalone disk utility program DCIP and have its startup message type out on the console printer.
I still have something wrong with interrupt level 4, the remaining issue as far as I can tell. I monitored the fpga input pin for the IL4 request and see it steadily at logic level 0 even when I believe I am requesting the interrupt. This tells me I have a problem in the wiring. When I looked closer at the chip 5 bottom connector, I saw the problem.
I rewired the connector but even with good conductivity to the input for IL4 on the chip, I wasn't getting the level to trigger. Too, level 2 now no longer triggers. There is still a connectivity challenge here, even though the memory loading is now solid as a rock. I swapped the IC just in case there was a problem with the component, but no change. More on this tomorrow.
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