Friday, May 27, 2022

Completed all of central processing unit, now entering device controller ALD pages


The ALD pages at the end of volume 3 and the remainder of volume 4 cover the device controller logic that resides inside the 1130 system. Each device, if configured into the system, has controller logic to react to XIO instructions, deal with interrupts, status words and handle the mechanics of input-output for the device. If a device is not part of the system, its logic is not installed. 

Even though keyboard, console entry switches and console printer are included on every system, they are treated like the other peripheral devices. I have completed everything else in the system and will now only be entering the controller logic for the devices for which I have ALD pages. These are:

  • Keyboard
  • Console Entry Switches
  • Console Printer (1053)
  • Internal disk drive
  • 1134 paper tape reader
  • 1055 paper tape punch
  • 1627 plotter
  • 1132 line printer
  • 1442 card reader/punch
  • 2501 card reader
Other devices that can attach to the 1130 system with controller logic inside are the 1231 Optical Mark Sense Reader and the Synchronous Communications Adapter. The 1130 I am restoring for the museum in Maryland has the SCA configured but I lack the logic pages. I may have pages for the SCA from another 1130 system, in which case I will enter them in the database.

Some devices that could be attached to an IBM 1130 system were only supported by attachment to the 1133 Multiplexor box. This contained the controller logic for those devices, and in turn it attached to the 1130 system through the Storage Access Channel (SAC) feature which is documented as part of the processor. I have never come across ALDs for the 1133 or the controller logic contained inside. Devices that attach through the 1133 or the SAC include:
  • 1403 line printer
  • 2310 additional disk drives
  • 2420 tape drives
  • 2250 graphics terminal
  • 2311 disk drives
The processor itself, before I began entering the device controller signals, had 2,799 signal pins listed in the database. As previously stated, these are output signals that flow to other ALD pages as well as signals that flow between compartments (backplanes). It does not include signals that flow on a backplane purely within an ALD page. 

Thursday, May 26, 2022

Halfway through entering signals into IBM 1130 database


I am partway into volume 3 of 4 of the Automated Logic Diagrams, having reached page 18 of this volume which is the 113th page I have entered into the database. For each I entered the gate, compartment, card slot and pin number along with the ALD page/gate and signal name. 

The memory control pages were particularly slow and cumbersome to enter, because I had to deal with the challenges of three different memory configurations. These were handled by notes on the pages about jumpers to place in various situations. I had to convert these to a form of signal name and record the pin locations.

The basic memory building block is an 8K core stack that fits on a backplane with surrounding SLT cards as drivers and other control logic. The smallest machine model is 4K which is a cut down version of the 8K stack. The stack logically consists of 18 planes, storing a 16 bit word and two parity bits. There are 8192 locations that can be addressed by unique X and Y values that define a point on the plane where one core sits. 

Larger machines than 8K can't fit in the standard part of the frame and instead require an additional cabinet extension, called the blister, which fits on the left side of the machine. This has one or two additional gates so that it can hold up to 32K of core. IBM calls machines with the blister Expanded Storage models. 

Because the signal distances are longer, it required line drivers and terminators, adding some gates and circuitry. Thus, there are jumpers shown on the ALDs to route signals to or around those driver gates (whose cards would not be populated on a non-ES machine). 

In addition to the ES configuration, later models of the 1130 were enhanced with higher performance. This was accomplished in part by fitting a different core storage module that was faster. The original models have a 3.6 microsecond memory cycle time, using the 'SJ-4' core storage modules. The faster models operate with a 2.2 microsecond memory cycle time using the 'SJ-2' core modules. 

There are additional gates for signals to 'look ahead' to provide conditions early enough to fit the tighter timing in a faster machine. A particular chain of logic gates might work just fine with the 450 nanosecond cycle time but it has enough serial gate delays in the chain that the 275 nanosecond cycle time is not long enough. 

Providing an early signal reduces delays in the chain and ensures reliable operation for the faster models. There are notes in ALD pages and jumpers that reflect where the design would differ between the two machine speeds. 

I was able to record the data so that I can debug machines like my own that are expanded storage models, as well as smaller machines such as the one I am currently restoring. I will be able to debug the 2.2 microsecond models if I were to work on one as well as the 3.6 us models I have worked with. 

All these variants and jumpers made the database entry particularly slow for the memory pages. Fortunately it was compensated for by the major register pages. These are replicated circuits - one SLT card provides the circuits for 2 bits of a word, thus eight of them are needed to produce a full 16 bit word register. 

In fact, these cards usually implement more than one register at a time, so that the RAxxx pages implement two bits of both the A and the U registers in one card. The RBxxx pages implement three registers, two bits at a time for each on one card. In a bit of inside humor, these registers are the I, B and M registers and the pages are labeled in that order to spell out IBM. 

Because of the high degree of regularity, I could copy and paste, change labels, change the particular card slot number and then handle the small variations that come from the routing over cables between backplanes. This sped up the entry of these pages quite a bit. 

Monday, May 23, 2022

Reached 1/3 point entering all IBM 1130 output signals and cable connections into database


At this point I have recorded 1,650 output and cross backplane cable pins. This is the 1/3 point measured in pages of ALD entered. 

I expect to have a bit more productivity when handling the pages for the major registers as we are looking at 16 copies of essentially the same circuitry, simply changing the signal names for the output but using the same card types and pins each time just in different slots of the backplane.

On the other hand, the I/O device controllers will be slower paced - fortunately they are in the final 1/3 and the finish line will be in sight. 

Saturday, May 21, 2022

Completed wire wrap fixes to replace temporary jumpers,


I removed the two temporary jumpers and replaced them each with a permanent wire using wire-wrap onto the backplane pins. This is more reliable and isn't as easy to snag and pull off as the hanging jumpers. If I discover any further issues with failed traces I will apply additional wire connections. 

The backplanes have long square pins sticking out on the backside. Traces on the backplane make connections between some of the pins, but the remainder of the connections are made with wire-wrap in an automated machine. Later in the field, additional connections can be made by the local engineer using wire wrap tools.

The pins have a square cross section. Thin wire (30 gauge) is wound around the pin which creates tight gas-proof connections at each of the 'corners' as the wire bends around. These stay very tight and reliable with no oxidation of the contact area. 

Wire wrap tool and wire

In my experience working with machines from fifty or sixty years ago, wire-wrap links effectively never fail; the rare cases involved wires being snagged and severely pulled. In contract, the printed circuit traces on PCBs and backplanes do fail at a non-zero rate, generally a result of flexing of the board over time. 

My wire-wrapped connection in light blue

Another wire wrapped connection in light blue


I finished wiring up the looms to the Arduino shield, verified the lack of shorts between adjacent solder connections and began testing. I had some problem with the power method I used for the Arduino and need to rethink this a bit. 

Completed attachment of looms to Arduino and shield

I had taken the +12V from the IBM 1130 as an input to a LM7805 regulator to provide +5V for the three relay boards as well as the Arduino, feeding the +5 to the pin marked +5 on the Arduino board. It appears that instead I should feed the +12 to the Vin pin and let the Arduino do its own regulation to +5V. My LM7805 can still power the relay boards. 

Friday, May 20, 2022

Building looms and connectors for Memory Load tool, continuing to build database of 1130 signals


I want good solid, reliable connectors onto the relay boards for the connections back to the Arduino. The relay board has a header strip, standard .1" pitch, with the eight relay control inputs, VCC and ground pins. I chose stranded wire as it is less likely to snap under repeated bending or movement, crimped into terminal that are pressed into the housings to create the connector.

The three wire looms are completed and laced up, with the connector attached to one end. I verified proper operation of the relay boards through the loom. Next up is hooking all 19 signals and multiple power lines from the loom to the Arduino shield. I began the task but it will take some time to be sure that this is done correctly.

Two of the three wire looms for Memory Load tool

Beginning connections to the Arduino shield


By this point I have completed 1/5th of the ALD pages, moving along at about the pace I expected when I began the project. I spend about four hours a day doing this work, the rest is spent in the shop on other activities. 

Thursday, May 19, 2022

Continued build of Memory Load tool, continued entry into database of signals on backplanes


On the Arduino shield there is a 7805 regulator chip with heatsink to  generate the +5V needed for the Arduino and relay boards from the +12V sourced by the IBM 1130. I built this and tested its operation. 

I began creating connectors to hook the relay boards to the Arduino in its project box,  where I solder the other ends of those wires to a shield for a more reliable connection to the Arduino. I began lacing the wires together to form a proper wire loom on the connector for Console Entry Switches 8 to 15 which are controlled by the leftmost of the relay boards. 

I did some testing of the wire loom and relay board, but did not complete the lacing nor start the soldering to the shield. Next visit to the workshop will have me finish this connector and move on to the next two relay board connectors. 


I go to 13% completion on the data entry pass 1. This is where I record all the output signals (right hand side of each ALD page) and all the off-backplane signals running over the cables between compartments. The next pass is where I record where each of the signals, when they are inputs on the left side of the ALD page, are routed to card pins. 

Progress report on signal mapping project


Reaching the end of my ALD Volume 1 with 21 pages captured, I have 611 signal locations recorded. This is strictly the outputs and off compartment connections from those pages. 

I will continue on with the project since continuity testing this number of locations is going to take less than one hour, not counting rest and sanity breaks. I projected this with a beep rate of a bit under 5 per minute on average. 

I have been adding in signals and pages I captured from various sources for features that are not on this system and some that are not installed on my 1130 either. This maximizes the utility of this database for any future IBM 1130 restoration or study. 

Features included this way are the plotter, 1442 card reader, 1132 line printer, synchronous communications adapter (SCA), paper tape reader, paper tape punch, 2501 card reader, and Storage Access Channel (SAC). The only feature that is missing entirely is the 1231 Optical Mark Reader as I have not encountered any ALDs with that feature configured.


I will apply some wire-wrap connections to replace the temporary jumpers that I added in two locations to compensate for broken/open traces on backplanes. Any additional missing traces will be repaired similarly, once I verify that a jumper resolves whatever problem that lead me to the failed trace.