Investigating anomaly testing SN74182N chips with Retro Chip Pro tester

 ALL MY 74182N CHIPS HAVE SAME FAILURE ACCORDING TO THE TESTER

The SN74182N chip is a Look-ahead Carry Generator for use with full adders to implement wide word adds without the delay of a ripple carry. It is typically used with the full adder chip such as 74181N which takes the inputs produced by this chip and provides the appropriate propagated carries. 

The G (generate) output is on if the adder generated a carry because both A and B inputs were high. The P (propagate) output is high when A and B are opposite logic values, either HL or LH.  If the Generate is true, there is a carry to the next higher bit adder regardless of the value of the carry input to this bit position. If only the Propagate is true, then the carry input of this bit position is passed to the carry input of the next bit position. If neither is high, no carry is passed to the next bit position.

One of the tests per the chip data sheet is verifying that when all four propagate inputs are low, the propagate output should be low.  The concept is used to pass the carry input to our 75182 chip when all four bit positions covered by the look-ahead chip are true. This is slightly muddied because the propagate inputs and outputs are all inverted - a high value means NO propagate. 

The tester flags that the propagate output pin (7 on the DIP) is high but should be low, when it sets all four propagate inputs to low. Any other combination of inputs would produce a high but this set of inputs should have created a low output. 

Since I have every such chip I own showing the same error, and these come from separate batches and sources, something is up. I doubt that all the chips are defective in exactly the same way, although there is an extremely low chance that some manufacturing feature is going to fail years after manufacture on every chip. Extremely low chance.

While it was possible that the test is incorrect, I looked at the datasheet and come to the same conclusion - with all four inverted P inputs low, the inverted P output pin should be low. I will set up a breadboard and test that the chip performs as expected just to put a nail into this unlikely explanation for the failure.

That leaves me with the possibility that some build error in my tester is causing this. One of the four input pins may not have a valid low even though the tester believes it is generating the proper code, or the output pin may be driven high by some erroneous signal. I will check for this using an adapter I built that lets me isolate one or more pins from the tester so that I can see what the chip is producing AND what is on the tester pin side without them interacting. 

Almost every chip I have tested has passed its tests. That should have already exercised the input pins and the output pins which makes me wonder what exactly is going on. I suppose that we could have a programming error where the test for the 74182 chip is not really looking at pin 7 but at some other pin when it senses the high. Finally, I can imagine a case where the output voltage for the low condition on pin 7 is high enough to register as a high on the tester, but I only include this for completeness. 

Stay tuned for the results once I am back at the workshop and can conduct the tests to narrow down the fault and draw conclusions.