Testing Real mode for Virtual 2315 Cartridge Facility - part 1

RESOLUTION OF PRIOR DAY'S TESTING ISSUES

I found a couple of errors, one a hardware issue and the other a design flaw in my Verilog for the FPGA. A pin was bent on the socket that the cable connects into on the 13SD disk drive - it was the pin for File Ready status, coincidentally. My logic that simulates the 90 second spinup of a disk drive for the pure virtual mode was blocking the signals from being passed along to the 1130's disk controller logic when in real mode. 

I loaded new bitstreams into the FPGA and some cleaned up code into the PICO processor, then resumed my testing. I still did not see any sector number changes on the device status word (DSW) on the 1130. The drive remained in Not Ready status. 

ELECTRICAL SIGNALS FROM THE DISK DRIVE ARE CORRECT

I checked the electrical signals from the 13SD internal disk drive into my Virtual 2315 Cartridge Facility (V2315CF) interface board. They were all present and correct. The issue seems to exist in my Verilog code in the FPGA. I will set up for some diagnostic monitoring so that I can track down the issue.

AFTER UNLOADING A VIRTUAL 2315 IMAGE, UNLOCK LAMP BLINKS

The Unlock lamp on the V2315CF monitors the Unlock detection signal from my interface board, which will have a transistor detecting whether Unlock is 48V or 0, the latter representing a lit lamp. However, since the circuitry in that portion of the interface has changed, I didn't have the Unlock wire from the disk drive connected. 

The result was that random noise on the line produced on and off values in the FPGA. Depending on the timing of when the PICO code asked for the Unlock status, it either saw it as off or on, producing an alternation - blinking. The temporary solution is to ground that input to the interface board, while the longer range solution is to wire in the circuits related to Unlock on that board. 

THE HOT BIT IN THE ACCUMULATOR IS AN ADDER ISSUE - TRIED CPU DIAGNOSTICS

I used the core memory loader to install the CPU diagnostic which runs through all the instructions with their variants and edge cases. It quickly flagged an error in that relative branch instructions (MDX) were producing the wrong result. 

The MDX instruction, short format, takes the last eight bits of the instruction word as a signed integer. It adds that to the address in the Instruction Address Register (IAR) which points at the next instruction to fetch and execute from memory. Thus MDX can branch about 128 words on either side of where the MDX instruction sits - IAR plus 0-127 or minus 1-128. 

If the accumulator has a hot bit 10, then the addition of IAR and the signed integer may produce the wrong answer - depending on whether the correct value also has a 1 in bit 10 or not. I will have to diagnose and repair this fault before I can run any code containing relative branches, addition, subtraction, shifting, etc.