Monday, June 29, 2026

Sent Head Adapter Tool off to fab; supports aligning heads in standard density Diablo 31 drive

GOOGLE AI CONTINUED TO SPEW INCORRECT INFORMATION

I asked Google AI to tell me the connector size for the head cable connection to the J10 PCB in the Diablo Disk drive. It responded authoritatively and confidently but embarrassingly incompetently. It was describing pin connections that made no sense. 

I called the software on one of the more egregious errors, claiming that each head had two erase coil windings. It apologized, said I was correct and updated its advice. Still woefully wrong. 

It asserted that the connection was two 6 pin connectors, one above the other. It still claimed that two leads came out from the erase coil and three leads for the read/write coil (two ends and a center tap Select line). Here is a picture of the cable from each head - only four pins just as is shown on the Diablo schematics. The erase coil has one end tied to the same Select line that is the center tap of the read/write coil, but the AI didn't grasp that. 

It said the connectors were standard 2.54mm pin headers. It gave pin numbers that don't match the Diablo schematics. The AI pinout had no ground connection and no mention of shields. 

I went to the workshop and examined the connector and the J10 PCB. I did some signal tracing as well. The connector is a standard 14 pin DIP socket. Not 6 on the top and 6 on the bottom. Further, it has four pins that grounding the shields of four tiny coaxial cables that carry the four head lines. 

I have tried using Google AI for some coding assists. It did a decent job giving me sample code to do new user interface tasks and using unfamiliar Python libraries. It seems to work adequately in that domain. However, for researching vintage computing hardware it emits AI slop. 

CORRECT PINOUT USED FOR MY DESIGN

I now know the pin assignments, which do match the pin numbers from the Diablo schematic of board J10. If you were to number a DIP socket in reverse, that is start with 1 at the top left, go to the right across the top row to 7, continue below with 8 and go back to the left bottom as pin 14, then the numbers match perfectly.

Pins 1, 2, 13 and 14 are connected to the board ground. Each pin on the connector has the shield of one of the four signal cables, two per head. Since there is no connection on the other end, there is no continuity to observe here but the PCB shows the pins tied to the ground plane. 

Pins 13 and 12 do nothing, they are unassigned. That leaves four pins each for the upper and lower heads. Each head has a connection to the common Select that ties the center tap of the read/write coil with one side of the erase coil. Each head has a line from the other side of the erase coil. There are two more lines, tied to the two ends of the center tapped read/write coil. 

4 - one side of the read/write coil that feeds Head Bus A

5 - the other side of the read/write coil, feeding Head Bus B

6 - Select, the common point

7 - the other end of the erase coil

8 - the other end of the erase coil on the second head

9 - Select for the second head

10 - one side of the read/write coil on second head, feeding Head Bus B

11 - other side of read/write coil, feeding Head Bus A

DESIGNED A SMALL PCB WITH A DIP 14 SOCKET AND DIP 14 MALE PINS

I whipped up a PCB that has pins to plug into the DIP-14 socket on the J10 PCB. It is marked with an up arrow much like the cable connector. Above that, it mounts a DIP-14 socket into which the head cable connector will plug. 

The erase coil of one head is connected to Head Bus A. The erase coil of the second head is connected to Head Bus B. The two Select lines for the heads are connected to their normal places. The other ends of the read/write coils are unconnected since this adapter uses the erase coil for alignment signal capture. 

SENT TO JLCPCB FAB FOR QUICK TURNAROUND

I expect the PCB to be built in two days and shipped back to me in about a week total time. It was fastest just to ship this off to JLCPCB who I had been using, in spite of the kind sponsorship from PCBWay.com since it adds time to arrange for them to pay for each sponsored PCB. 

Creating the Head Adapter Tool for aligning the Diablo drive

PROCESS IS DIFFERENT FOR STANDARD DENSITY (1130) CARTRIDGES

The method of aligning the heads takes advantage of the wider spacing of the poles of the erase coil in the head compared to the read/write coil. To do this, a special tool is connected between the J10 printed circuit board and the connector from the heads. It rewires the connections to switch the read preamplifiers from the ends of the read/write coil to the erase coil. 

This provides a very sharp null position over the track centerline so that only signals that are offset to the sides will be detected. The CE cartridge that is used to align packs had track 100 recorded with a special drive that offset the center of the spindle. 

This caused the written track to shift during a rotation, putting the center of the recorded track close to one edge and then the other of the .01" track width when it is read back on a drive with a normal spindle position. Since the center of the erase coil does not see a signal, the only signal picked up is from the portions of the special track that wander off center to be under one or the other pole of the erase coil. Correct alignment gives equal signal strength on both poles, otherwise we see more signal on one or the other so that the scope trace is unsymmetric. 

image for properly aligned head

High density machines, including the Diablo 31 we used to archive the Xerox PARC cartridges from the Alto computers, cannot use this method because the track width is too narrow. It must use the read/write coil for alignment. 

HEAD ADAPTER TOOL REWIRES THE CONNECTIONS TO USE THE ERASE COIL

No schematic or board view exists of this tool, but its purpose is described enough to work out a substitute. I will create a mini PCB that sits between the socket and the plug of the connector from the heads. It will also provide scoping connections.

Google AI gave me a start on the wiring, but it has several problems. As usual, it creates plausible text but can be way off on important details. The pin numbering from the AI output does NOT match any schematics of the Diablo drive. 

It refers at one point to the heads as having two erase and one read/write coil, which is NOT correct. It claims there are two erase coils (yes, but one per head) and a common return line (not true, separate wires from the heads only joined on the J10 PCB to form a common erase return path. 

Further, it doesn't seem to work with the method of selecting the head to align as described in the alignment procedure. The select line (a common line to all three coils in a head) has to be grounded. Grounding pin 5 of the J10 input pads selects the upper head; without that, the lower head is being selected. The wiring of the erase connections must conform with this. 

The AI discussion has both erase head ends connected across the differential amplifier, which is one for the top head and one for the bottom head. This could work if we have a floating select line hooked to one side of the erase coil in the head we aren't watching and an activated select line hooked to the other side of the coil on the head we care about. The two select lines go where the two erase return lines are connected on the original schematic. Here is what I think the wiring should be - from the head wires on the connector through to the socket on J10 PCB.


The normal wiring from the heads into J10 connects the two ends of both head's read/write coils together and they both feed the differential preamplifier, also called head bus A and head bus B. The erase coils are hooked on one end to the select line, as is the center tap of the read/write coils. The other end of the erase coil on each head comes onto J10 and are tied together there into a common erase return. 

All I need to do is disconnect the read/write coil ends and reroute the erase coil lines. Select lines remain unaffected. The erase coil line from one head goes to head bus A and the erase coil line of the other head is attached to head bus B. Very simple rerouting of the signals. 

HEAD SELECTION ON THE DIABLO DRIVE

The wiring of the heads uses a Select wire that is connected to the center tap of the read/write coils plus to one side of the erase coil. The two ends of the read/write coil are hooked to head bus A and B, while the other end of the erase coil is connected to a common return line that is grounded when erase current should flow through the erase coil. 

The select line is set to +14V when the write gate is turned on, thus the erase gate also drives the erase coil in this case. However, when the head is not selected, the select line is floating thus we don't have any erase or write current flow. For reading, the select line is set to 0.1V on the desired head and floats on the unselected head. 

As a result, even though the erase coils of both heads are connected to the differential preamplifier channels, only one select line is connected thus a signal voltage is only developed on one of the head bus channels at any time. 

WILL HAVE TO DETERMINE PIN NUMBERING OF ACTUAL CONNECTOR ON DRIVE

I have to sort out which pins lead to the read/write and erase coils of the two heads. The Diablo schematics should four pins per head, eight total. I know that it uses shielded cables to each head thus there are two more pins used for those shields. There is also mention of a chassis ground connection in the AI, but no documented in the Diablo manuals. That means I have 10 or 11 pins used in a 2x6 connector. If that matches what I find on the actual board and drive, then I can start developing the logic for the adapter.

I must work out how to connect the two erase coils (each with a return line) to the preamplifiers and how to cause only one to drive signals (selection of the head). I have to be convinced I have a rational wiring scheme before I design and manufacture my adapter board. 

Also to be determined is the pin spacing and size of the connector. I will have to put pins on my adapter board that slide into the J10 PCB with good contact, as well as mounting a compatible socket on my adapter where the connector from the disk heads will plug. Any elements needed to select which head I am aligning will also have to be placed on that board. A few turrets may be added to attach scope probes for raw measurements. 

Thinking about auto-aligning mechanism for the Diablo drive when archiving 2315 cartridges from an IBM 1130

IDEA FROM AI MAKES SENSE

I had listened to a hobbyist describing how they added a physical micro-positioner to offset a disk arm on a vintage drive when trying to archive content. It was for an entirely different disk drive and technology, but I was idly exploring the idea when I received a quite elegant solution from Google AI. 

It seems eminently achievable with minor modification to the Diablo drive and my FPGA archiver can generate the offset voltage to shift the heads forward and backward off the target track location. If a cartridge were written on a drive whose alignment of the heads was different from the standard position, then the recorded signals are slightly inward or outward from the standard track position by the amount of the misalignment. 

By modifying the servo feedback that keeps the heads exactly on position, the motor can shift the position where we read or write by some fraction of a track width. I can move to a particular track position with zero offset, then begin reading and interpreting the contents of the track at various offsets. The best results - no error checking or sync errors detected - would be the offset from which I archived the cartridge. 

HOW THE DISK DRIVE ARM MOVEMENT WORKS

The Diablo 31 disk drive uses a positioning mechanism that dynamically adjusts the position of the arm based on the target track and holds it in position based on an error signal it generates. Thus the drive moves the arms in and out driven by a rotary motor. This is very different from the IBM 13SD disk drive that is installed in an IBM 1130, which uses a mechanical ratchet to establish the arm at a particular track. The 13SD drive also uses a linear voice coil motor and only moves in 1 or 2 track increments, unlike the Diablo which can move smoothly as much as 203 tracks in one operation. 

A set of two signals 180 degrees out of phase are produced by teeth on a pickup disk that rotates under a fixed toothed transmitter on the motor. The signals A and B are used to create a sine wave that has a zero crossing at the spot where a track should be centered. The signals are also differentiated to judge velocity, so that the servo mechanism can control the speed of the arm movement as it seeks towards its target location. 

A counter is loaded with the number of tracks to be moved and is changed with every zero crossing of the position sine wave, until the count is complete. The drive then generates the error signal which is at zero when exactly aligned with the zero crossing point, but goes positive or negative when the arm moves out of position. This may occur from vibration, for example. 

The error signal is applied to the motor to bring it back to the zero crossing point, thus keeping the heads right over the center spot for the track. Whereas the 13SD drive mechanically locks the arm with the ratchet, the Diablo 31 has this servo loop to maintain position. 

ESSENCE OF THE MODIFICATION

The modification concept is very simple. Intercept the error signal and apply offset voltages to it, thus causing the servo to shift the head off center. An operational amplifier (OpAmp) is used to sum two voltages - the error signal from the drive electronics and an offset voltage in the range of -50mV to +50mV - which is then passed to the servo loop. 

If we shift the error signal by -20mV, for example, then the servo loop is going to move the arm until it has a true error signal of +20mV, which combines with our offset to yield a zero volt result that the servo locks into. We have a voltage source we can adjust via signals from the archiver, which generates the offset voltage. This feeds the new summing OpAmp in the servo loop.

The archiver normally produces 0V for the offset signal. In the adjustment mode, we pick a track to read and make multiple passes, each time varying the offset voltage in its range of -50mV to +50mV, picking the range of offsets that give us the best results. I envision a version of this that is used with an oscilloscope to visually judge the quality of the signal from the read head, as well as a pre-programmed version that attempts the assessment. 

An automated assessment might employ a phase locked loop on the clock bits and record cases where the clock is not detected at the proper time. That would be caused by the head voltage from the clock pulse dropping below the threshold for detection in the drive. Combine the 'missed clock' count with counts of check bit mismatch or sync failure and you would be able to mark those offset positions that are completely unsuitable. 

Looking over the counts on the range of offsets should yield the outer edges of acceptable reading for this test track. Find the midpoint and that is the desired offset with which to read for this side of the platter. Since the upper and lower heads are independently aligned, the correct offset may be different for the two sides. 

Then, during archiving operations after having determined the offsets, the archiver circuitry can produce the desired offset voltage appropriate for the head being selected. As the software switches between surfaces, the arm position could shift as well. 

We might need to add in some settling time when we change the offset. Thus, once the drive finishes a seek or a head selection change, when it believes it has stabilized the position and begins holding position with the servo loop, we apply the offset and wait a very short time. 

I don't think it requires much of a delay, since the dynamic nature of the servo loop which is keeping the arm in position already involves minute shifts to keep the head on the track, yet the drive design doesn't make any special compensation. It assumes this has no effect on quality of reading or writing. 

MY THOUGHTS ON IMPLEMENTING THIS

In my experience archiving around one hundred cartridges from the Xerox PARC library, I didn't find cartridges that had issues being read correctly due to misalignment. The issues we encountered were with cartridges whose surfaces already had some damage from light head crashes, which cascaded into heavier crashes that damaged the magnetic oxide to the point that the data wasn't recoverable in that area. 

The majority of the cartridges that I have on hand to archive came from two 1130 systems in Kansas, one at the business that owned my computer and another from a college nearby whose system was bought by the owner of my system as a second machine. At worst, I would have two alignments that between them would read everything but more likely all of the cartridges are recoverable with a single setting.

The IBM strategy with these drives was to align every drive to an IBM manufactured 'CE' cartridge, one that had a special pattern recorded to align heads. Each drive was aligned to these reference cartridges, which was intended to allow full interchangeability of cartridges between 1130 systems. 

The accuracy of alignment was not critical. The instructions for performing an alignment didn't enforce some maximum deviation from a perfect position. Following the instructions would likely result in heads that were offset from each other but were close enough for successful reading and interchange. 

The tracks are spaced .01 inches apart center to center (and the width of the recorded signal is then trimmed down by the erase head to a  width of .005"). This generates a dead band between tracks of approximately .003" which is where we would see the signal drop off. A full sine wave from the position detection circuitry would span .01" with the zero crossing point at the .005" center and the dead band appearing at around .0015" and ending around .0085" from the start of the sine wave. 

This suggests a simpler method of determining the offset for a head. Offset while watching a scope until the dead band appears, offset to the other side and note when the dead band appears, then pick the center of the range for the offset to use. This also appears to be a method where one could align a drive without having access to the special CE cartridge. If one arbitrarily assumes the cartridge one is currently reading is 'correct', then centering between the dead bands should give a workable alignment. 

The CE cartridge records a special pattern at track 100 that is an absolute reference. The above paragraph would be a relative reference, only as good as the alignment was for the cartridge you are using. 

Track 100 on the CE cartridge was recorded with the axis of rotation offset so that the track circle is offset from the center. Thus, the recorded signal will shift inward and outward from the arm position during each rotation. Watching on a scope, the arm is shifted in or out until the size of the signal is the same on both sides of the head, meaning it spends equal time on each side. That would put the head directly over the desired absolute track position. 

Pattern when 80% off from good alignment

Pattern when only 40% off

Pattern when correctly aligned


Saturday, June 27, 2026

Trying to understand 1130 MRAM sporadic failures using Active FET Probe

USING ACTIVE FET PROBE TO WATCH SIGNAL DURING FAILURE

I had been plagued by the inability to watch what happens when the sporadic failure occurs since the oscilloscope probe and the logic analyzer probes both loaded the circuit enough that the bit never was dropped. 

I purchased an active FET probe which introduces much much less loading on a circuit. It was a Tektronix P6201 probe which was sold as new-old stock. I also purchased a used Tektronix 1101 Power Supply which the probe requires for operation. With both shipments finally received, I checked out everything before putting it to use.



TESTING AND CALIBRATING THE 1101 POWER SUPPLY

I downloaded the manuals and began testing the power supply. I certainly didn't want a bad supply to blow up an expensive probe. The box produces +15V, -15V and +5V and delivers it over a unique cable to the probe. I got the voltages set exactly correctly and validated proper behavior of the overcurrent protection. 

ACTIVE PROBE VOLTAGE LIMITATIONS ARE WORRYING

The probe uses a field effect transistor to achieve a very high impedance, thus limiting the load on the circuit being measured. However, the FET has a pretty low threshold for maximum voltage. The manual for the probe gave the range of voltages that could safely be measured.

The circuit I will be probing is pulled up to +3V inside the IBM 1130 and then discharges to ground to set a bit into the storage buffer register. A capacitor is involved in the circuit thus there is the possibility of overshoots so I wanted to be quite cautious. 

The probe itself can tolerate levels of no more than +/- 0.6V, a 1.2V p to peak and with a DC offset built into the probe can be attached to lines that are +/- 5.6V, no more. It comes with two attenuators - a 10X and an 100X - that increase the max swing and offset. The 100X can connect to a +/- 200V line and record up to 120V swings, while the 10X has a max level of 6V and swing of 12V and a max +/- volt limit of 56. 

The probe can be put in AC or DC coupling mode, but even in AC mode the swing is going to be 3V or perhaps a hair more. I needed at least the 10X attenuator to protect the probe. 

The advantage is that the attenuators cut loading to the circuit being measured. The probe alone has an resistance of 100K ohm and 3 pF, but the attenuators bring the resistance up to 1M ohm and capacitance down to 1.5 pF. 

SET UP THE PROBE WITH 100X ATTENUATOR FOR MAXIMUM SAFETY

I did my first measurements using the 100X attenuator.  I hooked it to the backplane pin where my signal arrives to set the flipflop for B register bit 14, then set another probe on the scope to a pin for the detection of a parity error. This would give me the trace on my signal at the time that the bit failed to set and the 1130 stopped with a parity check. Once the Tektronix power supply for the probe finally arrived, I was able to attach it to the 1130 and record some data. 

I had the machine set to loop through the memory of the 1130 continually reading the data. In the past, after a few hundred thousand reads I would see bit 14 fail to set when the 1130 MRAM board is trying to set it as a 1 value. This triggers a parity check since the parity generated by the MRAM board is based on all the 1 bits, but the 1130 is missing one so that it finds the parity does not match.

The machine ran flawlessly. Just like with the ordinary scope probe attached. I detached the active FET probe and the machine then took some parity checks. This time it is dropping bit 2, not bit 14, but it is on about the same frequency as before and just as predictable. Just . . . not measurable.



When I force it to record a trace, the pulses look reasonable. The signal drops sharply to ground, then rises back to 3V. There is a small uptick in the middle of the low point, but it might be an artifact because I didn't have the shortest ground path for the probe.

I am going to experiment with the 10X attenuator and make some other changes, hoping that I can get a failure while I am watching. I sure hope that I didn't spend many hundred dollars for the active FET probe and will still fail to observe the problem. 

Thursday, June 25, 2026

Verified configuration of Diablo drive for use with the archiver

CHECKED OUT THE CIRCUIT BOARDS IN THE DRIVE


The drive has six logic boards inside (plus a power PCB and a backplane). By examining them I could look to see what options are installed on the drive - and whether it will work properly to read 2315 disk cartridges that had been written on an IBM 1130. None of the board numbers match the manuals available online; these appear to be older versions of the Diablo logic. 

I found one board (J1)with some wires added, which might have modified the behavior. I would need to back it out if so, bringing the drive back in conformance with the specifications. You can see a few violet wires, one end tacked to the connector on the left and a transistor that appears to have been added to the board by drilling holes. 

When I compared to the more modern versions of the board, I found the same transistor wired into the circuit in exactly the same way. I am assuming that this is a rework to add that transistor into the circuit from the previous design that was built into the board. As such I am leaving it in place. 

I looked over boards J8 and J10 to verify the options that might be installed. I did find that the drive was set up for daisy chaining. I see from the schematics that some drives were set up so that they could not, but this option also includes the support for the four signal lines Select 1 to Select 4 that determine which drive on a daisy chain will work. I also saw the jumper plug that configured this drive to respond to Select 1. 


I also saw that the drive does generate the Logical Address Interlock signal, asserted if a seek is requested to a track address that is not between 0 and 203. That might be option 064 which is for Varian computers, implementing four attention lines and the Logical Address Interlock signal. I didn't look at the attention lines since I don't need it nor care about that functionality.t around the circumference of its hub. There is one modification to shorten the sector marker pulse w

The drive does have the circuitry to report sector numbers for up to 32 sector versions of the drive. There is no way to change the machine to choose the number of sectors it supports. Instead, the Index Marker resets the counter thus it automatically supports the number of sectors that the 2315 cartridge has cuhen the drive is configured to support 32 sector disks, but it is not installed on this drive. 

I then checked board J10 for two important options. First, I verified that a 10 ohm resistor tied the Write Gate and Erase Gate signals together. If they did not, then option 008 would be installed to implement an independent Erase Gate. Second, I had to be sure that this was option 001 - 720KHz data rate and not option 002 - 781 KHz. That was determined by the value of a a specific resistor pair. If the main resistor was 9.8K then it is the wrong option, but I found the 10K value that matches option 001. 

DETERMINED CONFIGURATION IS GOOD FOR USE WITH THE ARCHIVER

It appears to have option 063 - off-white paint for Varian, based on the paint on the drive. It also has option 019 - extended mount - so that it can sit in a standard rack but have the drive extend forward about three or four inches. 

The disk heads are the metallic standard density type, not the ceramic heads you find with the high density drives. Exactly what should be installed. 


MODIFIED TERMINATOR TO MATCH THE SIGNALS I WILL USE

I started with the terminator that was closest to the version I need - it had pairs of resistors to terminate signals for all but two of the signals I will use. Using the VOM as a continuity checker, I located the open pads on the terminator where a 120 ohm resistor would pull up to +5V and a 330 ohm resistor would pull down to ground. I soldered new resistors in place at those locations and now have a fully functional terminator for the drive when connected to my archiver. 

CONNECTOR WITH RIBBON CABLE TO IDC-40 CONNECTOR

Here is the MRAC-42S connector that fits onto the rear of the Diablo drive. It is connected with a 40 wire flat ribbon cable that has a metal plate bonded along the length as a ground shield. The other end of the cable ends in a female IDC 40 pin connector (often used with internal hard disk cables in a PC). 



Building the cable for the 2315 cartridge archiver using the Diablo disk drive

SIGNAL CABLE NEEDED FROM MY PCB TO THE DISK DRIVE

The archiver I build connects to certain signal lines on the Diablo model 31 disk drive using a flat ribbon cable which has an IDC 50 pin connector on one end (commonly used for SCSI internal connections on PCs) and a Winchester MRAC-42S or MRAC-42P connector on the other end. 

The drive has both male and female 42 pin connectors on the rear. A terminator is connected to one side and the signal cable attaches to the other. Depending on the polarity of the connector you use,  you need the opposite gender terminator. There is also an MRAC-14S socket that brings power to the drive, connecting to the plug at the top. 

Every other wire in the ribbon cable is connected to ground, as a means of minimizing crosstalk between active signals. I started with a standard 50cm cable, two IDC 50 sockets on the ends, and removed one of the end connectors. I then split out the wires and soldered the appropriate signal wire to the associated pin of the MRAC-42 connector. 

AVAILABLE CABLES AND TERMINATORS

I have four terminators (three plug and one socket type) and several connectors and cables that I saved from the time when I built an archiver to use the Diablo model 31 high density drive to read and save all the 2315 cartridges from the Xerox Palo Alto Research Center (PARC) library before they disposed of them. These were all used on their Alto systems decades before. 

One challenge is that the Alto used the Diablo in non-standard ways. For one thing, they hot wired the Read Gate signal so that it was always on, emitting clock and data pulses back to the Alto. That unfortunately means that the cable from the Alto days does NOT have a wire to drive Read Gate. No wire in the cable and no socket for the signal on E of the connector. The designer sometimes cut off the terminator resistors based on the exact components they used in the Alto, ignoring impedance matching.

Another challenge that is endemic to the Diablo model 31 and 33F is all the options that exist with that drive. This means lots of variations in signals used and even in what signals had terminator resistors installed on the terminator boards. It requires me to carefully check the terminators I might use against the resistors that should be installed; I might need to modify one of them if none of the terminators match what I need. 

I do have two MRAC-42S connectors with the flat ribbon cable and an IDC 40 pin connector on the other side, but I needed to first determine which pin on the IDC-40 connector was hooked to each MRAC-42S socket, then determine how to shift the signals with an adapter of some type. 

QUICK ADAPTER BOARD DEVELOPED

After finding the signals on the IDC-40 connector of the existing connector I had on hand, I worked out the mapping between the IDC-40 connector pins and my IDC-50 connector pins. I used KiCAD to build a quick and dirty adapter PCB that housed two sockets - an IDC-40 and an IDC-50 - then routed the signals between them according to the map.

I shipped that off to be built and made certain that I had the IDC sockets on hand to solder this together when the parts arrived. I am waiting for quite a few shipments before I can put the archiver together completely - components from Digikey, the main circuit board from PCBWay.com, the adapter PCB, the sockets, the three power supplies, braided ground wire and parts to build the MRAC-14S power connector.

POWER CABLE CONSTRUCTION

The Diablo drive asks for four power rails to be delivered via the MRAC-14P connector on the rear. It uses +15VDC and -15VDC for everything on the drive. However, to minimize noise and the voltage drop on the wiring when heavy currents are drawn by the motor and the arm movement servo, the designers ask for a second set of +15 and -15 rails on their own wires to power the other electronics. 

I have bought two high current 15V supplies and a lower current dual supply that outputs both +15 and -15V, thus can feed the four power rails over wiring to an MRAC-14S socket. I used 16ga wire, as recommended, plus a braided ground wire. 

I found that the MRAC-14S sockets were quite rare and commanding a steep premium on eBay. The Winchester socket pins themselves go for up to $4 each and are almost always separated from the housings to extract maximum value for the sellers. I did find an MRAC-9S socket that had the socket pins included, where the price was cheaper than just buying the socket pins. Now I have to find a female MRAC 14 body or 3D print one if the prices remain too high on eBay.

NEXT STEPS WHILE I WAIT FOR ALL THE SHIPMENTS

I can install the best set of standard density heads into the Diablo drive and set it up for the alignment process. Aligning involves using a precious CE cartridge that has a special pattern recorded on cylinder 100 that allows me to move the arm to be centered on that track, by watching signals on an oscilloscope while turning setscrews on the arm; all this while the drive is spinning and the heads are on the almost irreplaceable CE cartridge. 

Therefore I need to find my least valuable 2315 cartridge, one that I can afford to lose if anything goes wrong when I first load the heads on the Diablo drive. I will clean that carefully and then verify that the heads fly without scraping, crashing or otherwise misbehaving. I will clean that cartridge's platter (as well as the CE cartridge platter) using 91% Isopropyl Alcohol and laboratory quality low lint wipes. The heads get the same treatment.

Of course, I need to cross check the Diablo drive against the options and configuration I need for the archiver. I have to plug it to respond to Select Unit 1. It must be standard density with the 720KHz clock rate - option 001 - or be convertible to that. I have to check other options to determine whether I have an independent erase gate (option 008) as that requires me to bridge some wiring in the cable assembly or modify the drive. 

Since I disregard the sector counter outputs, I don't care if this was configured for 12, 16, 24 or 32 sectors other than to validate the timing of the sector marker and index marker pulses. Other options like write protect, interrupts, attention lines, and logical address interlock are irrelevant and can be ignored. Other options cover the paint scheme and mounting brackets, also not important. 

This drive was originally installed in a third party manufacturer's cabinet that provided this as a second disk drive for an IBM 1130, along with providing an adapter to use a third party line printer as an IBM 1403 printer as far as the 1130 was concerned. As such, the drive should have option 001, not have option 008, and have option 026 for standard density 8 sector configuration.

The options list are not all listed on the physical drive. Many of them were just on the sales order, which I don't have, but I can look at the circuit boards and other aspects of the drive to determine which are included or omitted. 

I could even complete the alignment of the heads before I have all the shipments to build the archiver, as this process is done without any signal connector. All I would need is the power supplies and a temporary way to connect them to the drive.

Tuesday, June 23, 2026

Orders placed for interface PCB for the Diablo drive archiver for 1130 based 2315 disk cartridges

ARCHIVER PROJECT UNDERWAY

The Archiver makes use of certain models of the Diablo Model 31 disk drive to read the contents of 2315 disk cartridges that were used on an IBM 1130 system, then export the archived contents to files on a PC, Mac or other system. 

The main logic for the archiver is implemented in Verilog on a Digilent Arty S7 FPGA board but that requires a custom printed circuit board to manage the electrical requirements of the Diablo disk drive and the voltage maximums of the FPGA board. I designed a board to accomplish this.

PCBWAY.COM SPONSORING THE MANUFACTURE OF THE CIRCUIT BOARD

I uploaded the design to PCBWay.com who have offered to sponsor the production of the board. It is a four layer board, less than 4 by 5 inches, that installs on top of the Arty S7 FPGA board. It provides power to the FPGA board and its own circuitry, driven by a 9V wall wart DC supply. A 50 wire ribbon cable with an IDC connector - commonly used for SCSI internal drives - connects the PCB to the connectors on the rear of the Diablo drive. 


Above is the visualization from the PCBWay.com web site of the front of my board. The order was uploaded and I expect to have the completed boards in a couple of weeks. I chose non-standard solder mask and silkscreen colors which adds about half a week to the production versus standard colors.

COMPONENTS ORDERED FROM DIGIKEY

I also ordered all the parts for the PCB construction from Digikey. They will arrive before the board so that I can move directly into construction once I have the circuit board in my hands. 

GITHUB PROJECT STARTED

I opened a Github repository to share all the files related to this project - board designs, Verilog code, documentation and pictures - so that others can build this if they have IBM 2315 cartridges whose content they want to archive.  

Thursday, June 18, 2026

Given some pricy advice to make progress debugging the 1130 MRAM memory infrequent bit failures

1130 MRAM BOARD HAS BITS DROP ONCE IN MANY THOUSAND READS

The failure is rare. When I loop through memory, there are almost 278,000 reads done every second. With just 8K of memory implemented, this means the system has looped through every location almost 34 times in a single second. 

The symptom is a drop of bit 14, when it should have been set, at varying addresses in memory. It only happens after thousands of successful reads of the same word. When I put my Rigol oscilloscope probe on the pin where the pulse arrives from my board into the 1130 memory register, the error goes away. Instead, bit 10 will now fail at a even less frequent rate. Putting a second channel's probe on that bit leads to almost flawless operation. 

THE QUANTUM MECHANICAL NATURE OF THIS FAILURE

Therefore, when I put on the scope probe or a logic analyzer probe, the failure does not happen. It only happens if I am not observing. That means I can't see how it is going wrong, because I can't get the failure to occur while I am measuring.

ATTEMPTED MANY TIMES TO CREATE AN EQUIVALENT LOAD TO THE PROBE

I can't run the machine with my Rigol scope permanently attached. Further, it may be that after 20 minutes or five hours, another bit will fail to be set. Since the presence of the probe seems to cure the situation that causes the failure, I hoped I could develop an equivalent set of components that I could attach to the backplane pin in lieu of my scope probe. 

However, this is a very messy and complicated situation. Many inductances, capacitances and resistances are involved in the scope probe through to the input amplifier. I looked up the probe and the Rigol scope schematics, but those only show the discrete components. They don't show the wire and connection capacitance, inductance and resistance, but those values are also involved if you want a correct model to analyze the resultant equivalent circuit. 

ADVICE ON HOW TO BYPASS THE QUANTUM MEASUREMENT EFFECT

My friend CuriousMarc suggested that if I used an active FET probe, which has much lower loading than the passive probes, I can probably observe the failure. If I can see what is going wrong, I have a better chance of fixing it. 

I immediately went online to look for active FET probes for my Rigol DS1054Z scope. What I saw set me aback. Rigol is a very cost efficient brand of scopes, but the active FET probe choices ran from about $1,500 to well over $4,000 depending on bandwidth. 

Since I don't regularly have a need for that kind of probe, I would be spending that money just to measure this situation - a one time process. I can't even be sure that what I observe would definitively lead me to a solution, thus it is a gamble on top of a serious investment. 

LOOKING INTO DO IT YOURSELF ACTIVE FET PROBES

At this point, I am willing to consider building my own active FET probe. I did find a few projects done by competent engineers. This gets into serious RF magic territory, well beyond my usual engineering experiences. I picked one and am seriously considering the effort.

To control the characteristics of the PCB for this probe, I would have to shift from ordinary PCB material (FR4) to Rogers material, which would push the price for the bare board up to around $150. The design I found is centered on a MOSFET amplifier used in UHF analog television circuits - the BF998 dual gate enhanced mode N channel FET. This has dual gates and characteristics like extraordinarily low gate capacitance.

Of course, with the advent of digital television, the market for those devices has dried up. The chip is obsolete and not stocked by any of the reputable distributors. Of course there are many offers for the device on Amazon and eBay, all from operators in China, but the risks that I would be sold a lesser quality FET that was relabeled are just too high. If the gate capacitance and other specs aren't what the design expects, it isn't going to work correctly. 

I did find one location that has stock of the FET, is not in China and seems to have a good reputation. Assuming they didn't just by the stock from the scammers, but instead had a legitimate supply that came from NXP through a distributor, then this solves the availability problem.

I found an Instructable from someone who built the probe successfully.  They characterized it as less than $20 but that assumes free PCB construction and a substantial electronics lab to measure and adjust the probe. The values they determined for filters to make this work linearly are only for the board they built. Because - RF magic. 

Minute variations in the PCB, the components and even in my soldering will mean that when I build it, I may need to do the measurement and tuning process myself. Even the presence of a bit of solder on the traces beyond what is strictly needed to mount a component adds capacitance and inductance. Also, too little solder turns the joint into an unwanted capacitor. 

It isn't the most practical Instructable. There are only simplified schematic fragments. The gerber files show many components, about half of whose values are NOT specified. Instead of showing a full schematic, the person uploaded an equivalent analytic model in NI AWR Microwave software format - thus having elements that stand in for straight and right angle traces, as well as actual components. 

As one caveat, they mention that "you may need a membership in a laboratory, or acquire some people's affection who do (i.e. via cold beverages). Also, the 20$ price tag suggests you only need to buy the special components, not the standard things which lie around in an RF-lab anyway." They also assume I will be milling my own PCB from 512µm Rogers RO4003 w. 17µm copper dual-sided board material. 

I was able to take their gerber files and get them into KiCad so that I could produce an acceptable set of gerbers and drill files to send to a professional PCB fab house. I am working hard to identify the components they installed at all the open gaps on the PCB, so that I can purchase them. If I am successful in developing a complete bill of materials and can find the parts, I will then order the PCB and commit to the project. 

The component values which are totally custom are the ones needed to form a filter to compensate for a resonance around 800 MHz. He started with components such as 1.8 pf capacitors and 22 nH inductors, but suggests that I have a well stocked supply of different values to try. This might involve some iteration ordering parts from a supplier and stretch out the completion. 

The current snag in finding parts is the SMA connector he uses - it is a straight SMA female with a solder-on pin, but has a mounting flange with two holes. The flange is at right angles to the connector, but the inner conductor comes out straight. All I have found so far that have the flange at a right angle bring the inner conductor out at the right angle, which isn't going to work. If anyone recognizes this and knows where I can find it or at least how to describe it when searching, let me know. 

This probe produces a 50 ohm output impedance. My Rigol DS1054Z oscilloscope has a 1M input impedance. The solution is to add a 50 ohm terminator in a Tee connector at the input of the scope. I will have an SMA to BNC cable hooked to the tee where it is terminated, the other side of the tee connected to the scope input. 

Wednesday, June 17, 2026

Invested time simulating and correcting code to archive IBM 2315 cartridges on a Diablo model 31 disk drive

ARCHIVAL NEED

I own several dozen 2315 cartridges that contain software for IBM 1130 systems. Rather than risk them directly on the internal disk drive of the IBM 1130 (and rather than risking damage to the very rare disk heads inside the drive), I want to extract the contents and put them on virtual cartridges for use with my Virtual 2315 Cartridge Facility (V2315CF) for the 1130. 

The V2315CF holds the contents of a cartridge on an SD card inside a holder designed to look like a miniature cartridge. When inserted into the V2315CF, the contents are made available for the IBM 1130 to read and update while it believes it is accessing the physical internal disk drive of the 1130. 

A dummy 2315 cartridge spins in the physical disk drive, providing the timing information and offering the user the sounds and vibrations of a running disk and its seek movements. The data flow to the heads is instead fed from the V2315CF, giving the 1130 the stream of pulses that would have come from the heads. Any sector that is written to will have the pulses from the 1130 captured and update the contents of the virtual cartridge. 

The archived contents of the physical 2315 cartridges can also be used with the IBM 1130 simulators running on personal computers, expanding the pool of software available for hobbyists and researchers of the 1130 system.

IBM developed the 13SD drive and used it with the IBM 1130 and 1800 computing systems. It took the 14" disk platters and head technology from the larger 2311 and 2314 disk drives, creating a single platter version that was housed in a cartridge (a 2315 cartridge). 

The 13SD drive was installed in IBM 1130 computer systems, inside the main 1131 processor cabinet. Drives were also put into the separate IBM 2310 cabinet, hosting one or two drives in each cabinet to give expansion capacity for 1800 and 1130 systems. The cartridge was pushed into a front loading slot of the 13SD drive and spun up to use it with the drive, then removed when a different cartridge's contents were desired. 

DIABLO MODEL 31 STANDARD DENSITY DRIVE

Diablo licensed the technology from IBM to design their Model 31 standard density disk drives. These used the same 2315 cartridges and were compatible, able to share data between the model 31 and an IBM 13SD drive. A 2315 cartridge in standard density read and wrote bits at 720Kbps with the cartridge platter spinning at 1500 rpm. 

The data is recorded in a self clocking using a 'double frequency' method where each bit is recorded in a cell with space to record two magnetic flux reversals. The first reversal was always recorded - that was the clock bit. The second time interval would either have a flux reversal, to indicate that the data bit value was 1, or skipped a reversal to indicate that the data bit was a 0. 

The platter was organized into 203 concentric rings of information as the disk head moved radially inward and outward towards the center. 2315 cartridges from IBM had the circumference of the platter divided into eight equal pie slices, with a notch in the hub ring generating a Sector Marker as the drive reached each of the slices. A special double notch at one point generated the Index Marker to define which was the first sector of the eight. 

IBM chose to combine pairs of slices to form the four logic sectors that were used in the IBM 1130 and 1800 systems. Diablo offered cartridges with 8, 12, 16, 20 and 24 physical sectors per rotation. 

Diablo then enhanced the drive, doubling its capacity, as the high density version. Many other minicomputer manufacturers licensed the IBM disk technology and made use of the high density approach. Over time, these vendors also narrowed the size of a ring on the platter to implement 406 cylinders rather than 203. None of these were interchangeable with the IBM 1130. 

The disk controller for the 13SD drive handled disk arm movement differently from Diablo. IBM used a toothed comb with pins that held the arm in the 203 positions. An arm movement involved a command to the disk drive to move 1 or 2 positions in either the forward or reverse direction. The drive made a grunting sound as the pins detented into and out of the comb during seeks. 

A microswitch in the drive indicated that the arm was at the home (cylinder 0) position. Modeling the seek meant tracking the arm position based on the 1 or 2 track movements received as well as the home cylinder indication. A feedback signal turned off when a seek began and switched back on when the arm was settled in position on the new track. The command signals to move, the step size and direction were all defined length pulses. 

Diablo dropped the use of the comb and pins, instead implementing a servo that precisely positioned the arm at the 203 possible cylinder; it was much quieter as a result. The drive accepted different commands. It was given a cylinder number to attain and simply asked to seek. The request was maintained until feedback indicated it was accepted. 

The drive would first acknowledge acceptance of the target cylinder number with one feedback signal, requiring the controller logic to drop the movement request once the feedback arrive. Another feedback signal would turn off when the seek began and turn back on once the arm was correctly in position. The drive did not indicate when it was at cylinder zero.

The drive would emit the Sector Marker and Index Marker pulses, just as did the 13SD, but in addition would output a binary coded decimal Sector Number directly. The controller logic no longer had to interpolate the sector by counting SM and IM pulses. 

Other differences included a Restore command that would move the arm to cylinder 0. Error signals were generated if the requested new cylinder number was out of range or if the seek mechanism somehow failed to work properly. 

FPGA LOGIC WRITTEN A WHILE BACK BUT HAD KEY DESIGN FLAW

My version of the archiving logic used the 13SD seek commands and feedback signals. The Diablo model 31 did not conform to that, thus it required redesign to use the Diablo interface signals. 

ADAPTING TO THE DIABLO INTERFACE

Fortunately, I am quite familiar with the Diablo drives and how to drive them with an FPGA, as I did this to archive all the cartridges from the Xerox PARC library a few years back. Those contained code used on the Xerox Alto computers, the pioneering systems that developed the graphical user interface, ethernet, WYSIWYG and other concepts that made their way into the Apple Lisa, Macintosh and Windows. 

SIMULATING TO VERIFY THE UPDATED DESIGN

I changed the logic and then had to carefully simulate the behavior to be certain that my updated design conformed to the Diablo specifications and would work correctly. This was a long slow process as each rotation of the platter took 40 milliseconds to complete, with more than one turn required to be able to sync up with the SM and IM pulses to correctly mirror the sector number under the heads. This took a long time in simulation before I could observe the movement behavior. 

To fully simulate the archiving of an entire cartridge would require 120 ms per cylinder plus 15 ms for the one track seek. This would approach 30 seconds of simulated time, many, many hours of simulation time on the laptop. 

Sunday, June 14, 2026

Using new hysteresis technique to protect against noisy signals in some of my FPGA designs

EXTERNAL SIGNALS MAY NOT BE CLEAN ENOUGH FOR CERTAIN LOGIC

Every external signal coming into the FPGA has to be passed through a series of flipflops to reduce the risk of metastable states - the risk that if the pulse arrives at just the wrong time compared to the clock edge in the FPGA, it may assume an incorrect state or even hang up. The conventional solution is to pass through three clocked flipflops to clean up the signal for use inside the FPGA. 

The risk of a signal sitting in a metastable state goes down dramatically by the third flipflop. It does introduce a delay of three clock cycles before you are seeing what has occurred externally, but with a 100MHz FPGA clock and the relatively slow equipment to which I am connecting, this is not an issue.

These signals may have a bit of bounce in them, similar to how contacts behave when a switch is flipped. That is, even though digital logic is driving the signal rather than electrical contacts, I might see a sequence of bits coming out of the three flipflops that don't definitively transition between 1 and 0 states at only one cycle. The output might have a stream of 0 0 0 1 0 1 1 1 for example, where a long sequence of 0 change to a long sequence of 1 but there is a sort of stutter for a cycle or two. 

Often we want to react when a signal changes state, but we take an action only once. In essence we only care about the signal edge, the rising transition. If there is a stutter, than we might detect more than one rising edge when the external situation only changed once. If we are counting based on the edges, we might incorrect count higher than we should. 

In many cases, the external signal is used to advance a state machine, so that it doesn't matter that there is a pair of edges close together, but I have to think carefully about whether the state machine could malfunction with stutters. For example, the state machine may use the falling edge to move onward, which the stutter will appear to deliver. 

HYSTERESIS - SCHMITT TRIGGERING

Schmitt triggers are gates that switch at different thresholds in one direction than the other, designed to eliminate the risk of small variations inadvertently switching the output state. Usually this is an analog approach - perhaps the rising edge must get to 75% of the full on voltage before the gate registers it as a 1, but it won't switch back to 0 unless the falling edge drops below 25%. The signal can bounce or oscillate around the 50% level quite a bit and still not be reflected in the output. 

This is hysteresis - where the change in state depends on the history of the signal not just the immediate value. It adds a delay before the change in the signal is recognized and acted upon, but it can eliminate bouncing or stuttering signals. It involves different thresholds for when it turns to 1 and when it turns to 0. 

MY THRESHOLD FILTERS

I created a module that adds this hysteresis for critical external signals. It first address metastability with the usual series of three flipflops. It then adds or subtracts to a counter based on the instantaneous signal state. The thresholds for when the output changes are specific high and low counts. We might require five successive 1 values before the output is switched to one, when the counter reaches a count of 5. Future 0 values decrease the counter from its maximum, but we don't change the output state until we get to a count of 2. That spread between the rising and falling thresholds is the protection against bounce or stutter. 

The time delay can be an issue - in the example above a signal that rises to 1 won't be recognized for a minimum of 8 FPGA cycles, more if there were stutters. At 100MHz clock frequency, that is 80 nanoseconds or more delay. The case for most of my projects is that the signals are much, much slower than that. Even the stream of clock and data bits from the disk drive are changing more like 1400 nanoseconds, more than 17.5x slower. More importantly, all the signals are arriving wih a similar delay. 

It will add delay for when my output signals to an external device don't react for 80 nanoseconds, but that isn't significant. A sector on the disk takes 10 milliseconds to rotate past the head, thus the signal delay is only 0.0008% of the sector duration. 

I am first applying my threshold filters to the tool I built to use a Diablo disk drive to read and archive all my 1130 disk cartridges. The protocol for the disk is to record magnetic flux reversals in 'bit cells' of two bit times. A reversal always occurs first, which is the clock, then the second bit time skips the reversal if the bit value is 0 otherwise a reversal signals a 1 bit. 

The disk drive itself tries to separate the flux reversals and route them out separate clock and data signal lines, but I have to see the clock pulses to know which bit of a word that a data pulse belongs to. Thus, the edges of clock and data really matter in this process. I expect my filter to help me determine when to watch for data pulses and when to shift the prior result into a word. 

My state machine is driven by the clock pulse edges - the falling edge sensitizes me to watch for any 1 bit coming on the data line. The falling edge of the clock resets the detector, then any data pulse turns it on. The rising edge of the clock is when I check the detector to see if a data pulse had arrived any time during the roughly 1.4 microseconds between those edges. 

Another application where the threshold filter might be very helpful is in the Virtual 2315 Cartridge Facility, where I have had some discrepancies between the seek distances requested by the disk diagnostic program and the attained cylinder position. Since the commands from the 1130 to the disk pass through the V2315CF, if a stutter caused a failure in my FPGA logic I could have dropped a movement or added one as I drove the disk drive from my code. 

Found substitute spring for the Calcomp 565 plotter and verified it works properly

RESTORING CALCOMP 565 PLOTTER

I was given a Calcomp 565 Plotter, one of the first drum plotters, which is the same mechanism as IBM resold under the model number 1627 for use on their 1620 and 1130 computer systems in the early 1960s. Since I own an IBM 1130 I was given this machine as an eventual restoration project.

The machine had suffered a serious blow on the drum, denting it significantly. It had been disassembled and was in a bin when I received it. In addition to the drum damage, it was missing the pen assembly, a solenoid that pulled a pen up away from the paper or dropped it down to draw on paper fed around the drum. 

Recently I found a Calcomp cutter which was the same solenoid and a slightly different top. used to cut films on the same plotter instead of drawing. I bought it and plan to modify it to accept a pen so that this plotter could once again draw graphs under computer control. All that assuming I could repair or find a substitute for the drum. 

I recently repaired the circuitry, which had a few bad semiconductors, then began to reassemble it temporarily, with the bad drum, to confirm whether it could be restored once I solved the drum and pen issues. I discovered it was missing a spring as well as some nuts and bolts. The fasteners are no issue at all, but I needed to replace the spring.

CABLING TO MOVE PEN CARRIER LEFT AND RIGHT

A pair of metal rods across the front of the plotter support a moving fixture into which the pen solenoid is mounted. Cables stretch from both sides of the fixture, around pulleys inside the plotter, connect to a stepping motor, and then are joined by the missing spring at the back. 

These cables are insulated with a plastic sleeve at the front, since they also carry the current to activate the solenoid when the pen is to be held up off the paper. The rear portions of the cable are not insulated and ride over metal pulleys that are isolated from the machine chassis. These two pulleys make the connection of the 24V solenoid power to the cables. 

The routing and winding of the cables around one pulley and around the stepper motor is a bit complex, but the result is that when the stepper moves, the fixture slides left or right. The spring at the back maintains the proper tension on the cables. The two cables have nylon eyelets so that the spring does not make electrical contact, merely providing tension. 

What I didn't have was any idea of how long the spring is and how resistant it is to extension. Too, I didn't know the target tension it should be applying to the cabling. 

KIND ASSISTANCE FROM COMPUTER MUSEUM OF BASEL

I have had help over the years from the Computer Museum of Basel, in Switzerland, as they have a restored IBM 1130 system. We often cooperate on 1130 issues. Alex and Christoph agreed to measure the spring in their Calcomp 565 plotter so that I could then look for a suitable replacement. 

They provide very precise measurements of the rest and extended length of the spring as well as the tension it provided to the cables. That was just what I needed. 

FOUND SUITABLE SPRING AND INSTALLED IT ON CABLING

I did locate a spring that had the correct rest and extended length, as well as the force it should exert when stretched to the target length. I wound the cable through the machine and inserted the spring in the rear to hold the cable ends together. It wasn't a final assembly but was sufficient to verify that this will allow the plotter to work properly once I have the pen and drum issues solved. 

Rough fit test of spring

Thursday, June 11, 2026

Whipped up a 1053 Emulator log file display and print program

1053 EMULATOR OUTPUT ON PUTTY SCREEN VERSUS PUTTY LOG FILE

The Putty terminal program screen shows the text being output by the 1130 in black or red text, exactly as it would be seen on paper if an actual 1053 were used instead of the emulator. It also saves a log file but that does not support color, thus the ANSI color sequences are visible, disturbing the look of the output.

PROGRAM TO REPLAY THE LOG AND TO PRINT IT

I wrote a Python program to open the file (using a standard file dialog box starting at the Desktop). It then asks if the user wants to skip the green text. The startup of the emulator prints its menu in green. Too, the responses to any command typed on Putty to the emulator are displayed in green. Choosing Yes to this dialog box means all that is removed. This leaves only what the user would have seen on paper on the 1053. 

The program displays the log file in logical pages of 120 columns by 35 lines. Buttons are provided to move to the next page or to the previous page, as well as to print the current page or to quit. The program uses the Windows default printer, in landscape mode, to print in color. Thus any color capable printer will give a page by page copy of the session that is recorded in the Putty log.

File open dialog starting Desktop


Option to omit non-1130 output

Main window

When the Print Window button is pressed, it blinks red and green until the print has completed. The Quit button immediately ends the program. The other two buttons allow the user to move down page by page in the captured virtual paper form that was printed by the 1053. Each page is 35 lines deep by 120 columns across. The output is printed in color and in landscape mode, filling the printer page. 

I included this in the github project as well as it will be useful to anyone who builds and uses the emulator. 



Wednesday, June 10, 2026

Implementing and testing the overtyping behavior in the 1052 Emulator - part 3

METHODOLOGY FOR OVERTYPING

Since the Putty terminal program does not combine the characters into a single composite, the original design was abandoned. The older design kept up to five characters buffered for each column, issuing the Zero Width Joiner character between them in a futile request to have the terminal program overlay the pixels into a single displayed character. 

The line buffer now saves only one character for a column or is zero if that column has not yet been type onto. Each time we perform at carrier return or line feed, the buffer is zeroed out again. When the 1053 backspaces, we move back to the prior column. The terminal program goes back and erases the column, so we retype what was saved in the line buffer.

When a character is typed at a column, the code looks to see if there was a previous character that had been typed there. If so, and only if the APL (988) typeball is being used, we will look for the eighteen cases where APL on the 1130 overtypes pairs of characters to form a composite. When we find a pair, in either order of typing, we replace it with the Unicode character that is the composite glyph. 

One pair in the table is for the ∇ (del) and ∣ (stile) characters, which combine to form the composite ⍒. Another example is the ∩ (cup) and ∘ (degree) which when overtyped form the composite ⍝ .

FINAL TESTING OF THE 1053 EMULATOR SHOWS IT IS READY FOR PRIME TIME

I put the emulator through its paces, testing as much as I could including many edge cases. As far as I can determine, this is working exactly as intended and ready to be used for any purpose as a substitute for the 1053 Console Printer. 

Tuesday, June 9, 2026

Created an SMS signal socket to connect to a paddle card for the 1052 Emulator

SMS SIGNAL CONNECTIONS USING PADDLE CARDS

IBM had developed standards they used to build computers in the 1950s and early 1960s, starting with the IBM 7030 - Stretch - computer and including all of their transistorized 70xx and 14xx systems and spinoffs. The cards that implemented the logic had discrete components such as transistors mounted on printed circuit boards with thirteen contact pads on the edge that fit into sockets on the backplane of the computer. 

The contacts are labeled with letters from A to R. IBM skipped letters I and O as these were easy to confuse with the digits 1 and 0 particularly with the low resolution printers of the era, thus A B C D E F G H J K L M N P Q R are the contact names. The contacts are all on one side of the PCB. 

A mainframe of the era involved multiple backplanes (gates) which had to be interconnected by cables. A backplane from the 1401 holds six rows by 26 columns of sockets, thus can fit up to 156 cards. The backplane used wirewrap on the back to connect the pins of the 156 sockets together. Some of the card slots are used to connect cables which route signals between backplanes.

A version of an SMS card that has the thirteen contacts but is used to connect wires from a cable instead of components is called a paddle card. These are inserted into a socket to hook the cable to the backplane. A cable therefore typically had paddle cards on each end, plugging into different gates. 

When IBM moved to the next generations of computers, such as the Solid Logic Technology (SLT) used with S/360 and 1130 systems beginning in 1964-1965, the leveraged some peripherals and components from the earlier SMS generation. Thus, inside an 1130 system, there are spots where SMS cards, sockets and paddle cards can be found. These include both power supply technologies and older peripherals attaching to the new SLT systems. 

For example, the console printer (1052) of the 1130 and 360 systems attaches via SMS paddle cards into a block of SMS sockets inside the new system, as does the 1627 plotter, and the 1055 paper tape punch. In S/360, devices like the 1403 printer leveraged many SMS cards to control the printer thus SMS gates and sockets were folded into some frames. 

GENDER - SOCKETS VS PADDLE CARDS

There were situations in the SMS era where two cables had to be plugged together, for example when two independent frames holding gates were put together during installation in a customer location. A dual sided socket was created that was not mounted in a gate(backplane) but mounted near the interface between the two frames. A paddle card is plugged into each side, one cable from each frame, to join the two together. 

In essence, a paddle card plugged into one of these adapters creates the equivalent of a socket. Inside the 1130, a row of these adapters are used to accept the SMS paddle cards from the older peripherals, leveraging hybrid cables inside the 1130 having an SLT connector on one side and an SMS paddle card on the other. 

The supply of these adapters, as well as of SMS sockets as used on a backplane, is extraordinarily limited. I own two sockets and can borrow an adapter from my own 1130 by disabling the console printer temporarily. 

The reason that this matters is that when IBM built the 1052 console printer, they have two signal cables, but only one has an SMS paddle card on the end. The other signal cable has a special SMS socket, much rarer than adapters or sockets. When I built my 1052 Emulator box, I used SMS paddle cards for both signal cables because that was all I had available. 

This means that I need to use a borrowed adapter to convert one of them into a socket to connect to my 1130. The 1130 only has one gender changer/adapter for the 1052, the other space requires the cable socket from the 1052 be used. Hooking up my emulator ties up the borrowed adapter, which is not a workable situation for when I want to loan the 1052 Emulator to others. I therefore need to modify one of my signal cables to have an SMS socket on the end. 

CREATING MY SOCKET TO BUILD A CABLE

I had previously designed and built a few PCBs that create an SMS paddle card to which I can connect wiring. Recently I developed a housing that could convert one of those (male) paddle cards into a (female) socket. The first sample of the housing arrived yesterday and I assembled it with one of my paddle cards to test out the mating effectiveness.


This card implements the 13 contacts, with holes to solder wiring from a cable. It was created with four holes where bolts and nuts can be used to attach it to something. 


This holder can attach the SMS paddle card PCB using bolts and nuts. If I solder a spring contact, an RF shield finger, onto each of the pads, it creates a means for another SMS paddle card to be inserted and make good contact with the newly created socket. I added notches on the sides to mount this in the slots in the 1130 where the gender adapters or cable sockets are held. 

It turns out my design for the holder is not perfect. I had to do some improvising with a Dremel tool and drill some new holes, as well as cut notches in the SMS paddle card PCB with the shields on it, but I was able to assemble a working socket. 

SMS SIGNAL SOCKET MADE FOR PF2 CABLE

The second signal cable from the 1052 typewriter (console printer) has a female SMS connector on it, rather than a paddle card. I built an equivalent socket and wired it up. A quick final check on the 1130 verified that the cables work properly


PACKING THE EMULATOR UP TO LEND TO SYSTEM SOURCE MUSEUM

I completed an installation and operations manual as part of the github repository for the project and provided the document along with the necessary files (APL 385 Unicode font) to help them get this operational as quickly as possible. 

The 1053 Emulator will be on long term loan to the Systems Source Museum since they frequently demonstrate the 1130 system and the 1053 console printer is the most fragile part of the system. This gives them an alternate way to allow visitors to interact with the IBM 1130 without chewing through boxes of special paper.