It is possible to thread tape manually through the machine and onto the take-up reel, then press the Load/Rewind button. This should advance the state machine to the DUMP state where the two reels rotate to feed tape into the vacuum columns. I set the BOT and EOT photocell inputs to the state if a tape were blocking the path, pushed the L/Rew button and saw the machine enter DUMP for 2.5 seconds.
Once the tape loops are sitting in the middle between the sets of photocells, the IN-LIMIT signal is generated which stops the load process and allows the drive to be made ready by pushing the START button. This should mark the drive as online and ready. It would then accept commands for movement.
Accomplishing this requires a bit of dexterity. IN-LIMIT must be off when the L/REW button is pushed, but after a couple of seconds when it goes into DUMP state, IN-LIMIT must be made ready.
To simulate the START button, I brought the input single low and then the circuit logic indicated my drive was online and that the READY lamp would be lit. At this point, it is primed for movement.
However, when I looked at the movement status outputs, the board was still commanding reverse, as it was still seeking the BOT tape. I had the signal active, but the logic for finding this requires that EOT be off at the same time. I tried to drop the EOT signal while leaving BOT activated.
This worked! The drive was still READY but the reverse movement stopped, the brakes were put on and it sat waiting for commands.
DRIVING VARIOUS MOVEMENTS ON THE DRIVE
The controller for the tape drives can issue commands to move forward, move in reverse, rewind, and unload by asserting input pins to this board. The action should continue as long as the command is asserted. In the reverse direction, it may be stopped by the BOT signal unless I deactivate it.
It took a couple of tries to get all the input signals hooked up and timed as needed to set up the drive as ready. That allowed me to reliably set up the motion tests below. While doing that, I found that any reverse movement was blocked by the brake on latch. I had suspected it was due to a bad 96L02 chip, but I see that the latch is being forced to reset by a bad NOR gate.
Chip U4B, a 74LS02 quad NOR gate, has pins 11 and 12 low (appropriately) but the output is also low, not high. Unless I could find a short somewhere on the board, then I had a bad chip. I flipped the board, inspected and did some basic beeping. It turned out to be a shorted input on a different chip, one which I had to replace and documented in a prior post. That was repaired.
I moved on to a more methodical checkout of the board, to verify the sanity of outputs, toggling the machine to various forward, reverse, rewind and other conditions, and stepping the loader state machine from REST until the drive goes ready.OFFLINE TESTING MODE
In addition, if the drive is not online, a pushbutton can enable the internal movement tester on the board. It can then move the tape forward and backward by pressing other buttons on the board. To accomplish this, I have to go through all the steps to ready the drive EXCEPT for the ON-LINE signal from the Start button.
Then, a pushbutton on the board will set the board into tester mode. First I verified that it accepted the tester mode push, then used the two directional pushbuttons to validate movement was being requested of the capstan logic.
This worked great - the tester drove the forward and reverse direction command outputs that control the capstan pre-amplifier. I didn't spot the forward command driving motion but after tracing through the chain of logic gates I found another gate whose output should be on but it wasn't.
It was one of the 74LS08PC quad AND chips, although drawn as an inverted OR. Trouble is, an OR of inverted inputs is not the same as an AND. They SHOULD have drawn it as an NOR of inverted inputs since that gives the same truth table.
Surprised it was misdrawn, I looked at other places where these AND chips were used to see how they drew them and found another place where they misrepresented it in the schematic as an OR or inverted inputs.
No wonder the chip output didn't agree with the inputs and the schematic symbol! It was working properly, thus my problem is in a different place than this gate.
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| AND gate on right side is incorrectly drawn as OR |
The input 01 is high, since it is the notQ output of the rewind flipflop and we are not in a rewind. However, input 02 is low, driving the output low. The latch on the left is on, so the Q output (pin 5) is high. This drives the inverter output low(pin 15) which should cut off the transistor and make my NOR input 02 pull up to high.
In fact, regardless of whether the latch on the left is on or off, input 2 to the rightmost gate is always low. I have to zero in on those components and determine what has failed or is wrong with my test setup.
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| Transistor inverter |
That means the transistor will be conducting in either case, pulling the output down. I don't see how this could switch off unless there is an applied voltage below ground level on the left side of the diode. After some research by my friend Ken, we discovered that this circuit counts on the diode voltage drop being around .45V, less than the .6 cutoff of the 2N2222 transistor. Not the best circuit in the world but it should be working.
Whether the input to the left inverter is high or low, the transistor remained conducting, pulling the circuit output low. I snipped the diode out of the circuit expecting that I would see +5 on the gate side, but it was near zero volts. We might have faults in an open R51 however it measures correctly. We might have a fault in C20 or in Q6.
Believing that a blown transistor is more likely, I removed it from the circuit and measured the voltages in the remaining components. All was as expected now, with both R50 and R51 showing +5V on both leads, while C20 had +5 and 0 on its two ends proving it wasn't shorted.
I grabbed a substitute PN2222 transistor and soldered it into place. It wasn't the same small round can format, but I was fine with the black plastic shape since it sat low to the board. After it was installed the malfunction began again.
Bad analysis on my part. I believe I have zeroed in on the cause and it is a fault in the left hand inverter. This is a darlington pair of transistors, acting as an open collector inverter. When the input pin is set to low the inverter does nothing and the circuit I am debugging will sit with the transistor conducting to produce a low output.
When the input pin of the inverter is set to high, the transistor pair should pull current to ground through the rest of my circuit, lowering the gate of my circuit until it turns off and the output becomes high. It is difficult to verify what is happening since the main action of this inverter is to be a current drain - a VOM isn't terribly enlightening.
What I chose to do was to apply a ground wire to the output of the inverter. That won't hurt the darlington pair at all, but will test the behavior of the rest of my circuit assuming the inverter properly pulls the output down near ground. I was pleased to see that the circuit being debugged would go high in this case. It appears the fault is in the darlington pair inverter.
The obvious next step is to remove the ULN2003 and replace it with a good one, but as a test of my theory, I can breadboard another ULN2003 chip and hook its output in parallel with the bad inverter. Applying a high signal to my breadboarded chip should produce the desired current drain and hopefully cause my overall circuit to operate properly.
Immediate snag - can't find another ULN2003 in my stock. I have to wait until Saturday evening to get the new chip, perform my test and potentially replace the bad chip.
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