OUTCOME OF THE FIRST FULL LOGIC ANALYZER SESSION WITH THE READER
I set up the analyzer to trigger on the start of the PCLK clock, which is a 120Hz counting clock that is used by the pick circuit to watch for a failed attempt, where the card does not arrive at the read status within a defined time period. I also observed the reset signal TSTR that zeroes out the offset counters in preparation for the time when the leading edge of the card first passes the photocells.
What I saw at that time was that both OneDark and OneLight were high. Neither changed within the length of the analyzer buffer. Later I determined, using the scope, that they do in fact change as cards move by but it wasn't in the trace I captured.
Normally I would devise a secondary triggering strategy in order to catch the interesting signals within the buffer, but I can immediately see that something isn't right because OneDark should not be true.
WHAT ARE THE ONELIGHT AND ONEDARK SIGNALS?
There are various times in the movement of a card when the control logic needs to know if the full set of 12 photocells are dark or if the full set are illuminated. What these signals mean is that one OR MORE photocells is seeing light, for OneLight, and that one OR MORE of the photocells is dark in the other case.
The reader knows that a card has just arrived when OneDark goes on. This is because the leading edge of the card is starting to block the light between the LED and the phototransistor for one or more rows.
Once the card is in the station fully but prior to it reaching the area where column 1 of the data is punched, the error checking logic tests that OneLight is false. There should be solid card blocking the light at that point.
After finishing reading the hole patterns for 80 columns of data, the card advances to the space that would be column 81, Once again, error checking circuits ensure that OneLight is off proving that we have the right side of the card blocking the light. By the time equivalent ot column 84, the trailing edge of the card will have passed beyond the photocells and the error logic insists that OneDark is false - that light is reaching all twelve photocells.
WHY THE RESULTS DEMONSTRATE A PROBLEM
At the time that the pick begins, no card is in front of the photocells and we should have all twelve LEDs illuminating all twelve phototransistors. The signal OneDark should be false at this time, and it shouldn't change until the leading edge of the card begins to interpose, blocking light.
However, OneDark is steadily true. This is a problem.
CHALLENGES GETTING TO THE ROOT CAUSE
The only signals brought out to the backplane are OneDark and OneLight, not the twelve individual row values. While the separate signals exist on the Control PCB, the way that a signal such as OneDark is generated uses a wired OR. That is a technique to avoid the cost of extra logic gates or diodes, by shorting together all twelve open collector inverter outputs, pulling the shorted combined line up with a resistor, and considering the result to be the inverse of the condition.
In other words, if we pass the twelve phototransistor signals through the inverter, a dark phototransistor will not cause the output of its inverter to pull low. Thus, when all twelve inverters are high because none of them had a true (light) input, then the resistor keeps the shorted output high meaning that we did NOT see any one or more lighted cells.
As a quick test, I swapped in the Control PCB from my working M600 but saw exactly the same iniitial state where OneDark is true but shouldn't be. If the problem were logic chip failures or other hardware defects on the Control card, I could tack wires to check each and every photocell line to find the one that appears dark.
With the problem more likely to be bad phototransistors, LEDs, cabling or connectors, I need to do different testing where the access is even more limited. The phototransistors and LEDs are wedged between two large aluminum structures that also hold all the rotating parts to drive cards forward. Opening it up would be challenging and then everything will need to be aligned again.
phototransistors and LEDs |
PREPARING TO TEST THE PHOTOTRANSISTORS AND LEDS
The wire leads from the transistors are wired directly into the left side connector for the Control PCB, with no exposed conductor I could reach. Until I have an extender that would expose those contacts, there are two ways to debug. First is to tack wires to the PCB and see what the twelve transistors are delivering onto the board. The second is to remove the PCB and directly connect to the 12 contacts on the connector.
I had to unscrew the connector and bend it around to give me access to the contacts, but that is now complete. I will set up a simple circuit to validate the output of each cell then apply it to each contact.
Connector twisted out of cage to permit access |
ERRATIC ONEDARK OUTPUT LINE
Using the scope and tacked wires I observed the OneDark and One Light signals from the PCB. The OneDark would sporadically pop on even though nothing was happening with the reader. When I tapped on the card cage or reader, it would exhibit a higher rate of random pulsing.
It is essential that i track down this behavior and correct it before moving on to other testing.
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