Cleaning disk drive heads and checking arm movement; repaired 5800000 spare card

GIVING THE 2310 DRIVE SOME ATTENTION AS I WAIT FOR PARTS

I am still waiting for the new start capacitor and air filter for the drive, plus waiting on the PCBs and components for the plotter controller card replacement. The drive is still filthy, requiring considerable cleaning before a cartridge would ever be inserted inside. 

I used some wipes and swabs to clean the disk heads. They had a coating of dirt that had to be removed, although the surface of the heads appears to be in good condition. 

The first pass wiped off quite a bit, but after some time I had reduced the dirt on the heads to more normal levels. They are still not clean enough to risk flying on a disk surface, but we will get there. 

First pass with isopropanol cleaning heads

I am a bit concerned that the head loading arms are touching the upper head but leave a sizeable gap to the lower head. Something is awry that must be diagnosed and corrected. 

REPAIRING A SPARES BOX 5800000 CARD

I had a 0000 card in my box of donor cards that I use to pull off components when repairing other cards. I put it on the bench and tested the behavior of the card; one input on one of the six gates was defective.

Each gate is on its own 361451 SLT module, so the repair is simple. Find which module handles the gate with the error, remove the module and put on a spare from another donor card. The work was quickly done and the card now tests out perfectly. It can be used in an 1130 system. 

Possible to bench test the 2310 disk drive (inside 1130 system)

DISK DRIVE HAS CE CONTROLS THAT ARE ACTIVE IF CONTROLLER CABLE REMOVED

The signal cable between the disk controller logic inside the 1130 and the disk drive proper can be removed. This allows the four switches to work, triggering movement of the disk arm and selecting between the two disk heads. 

The CE can then put a scope or logic analyzer on the data outputs to observe how the drive is reading data from the disk surface. It can also be used when the engineer aligns the heads so that they are positioned the same spot on a cartridge as any other 1130 system, ensuring interchangeability for cartridges between different 1130s. 

The drive must still have power connections. There is 115V to power the blower and spindle motors, but also the logic voltages of an 1130 system. It needs +3, -3, +6, +12 and +48V to operate. 

BENCH TESTING POSSIBLE WITH ENOUGH POWER SUPPLIES

I have plenty of power supplies on the workbench so that I can bring up the drive without any connection at all to an 1130 system. Power must be sequenced properly so that +48V is not applied until the three main logic voltages are correct and it must be removed before the others are switched off. This is the only caution for bench powering the drive.

Blower air volume is excellent once I removed the nearly completely blocked old filter

DISK DRIVE FILTERS AIR TO EXCLUDE PARTICLES IN 125 MICROINCH RANGE

Because the heads fly as low as 125 microinches (3.2 microns) above the platter on a thin film of air, any particles larger than the flying height might drive the head down into the surface of the platter, potentially causing a head crash. IBM employs an almost HEPA-quality filter to ensure clean air enters the cartridge. 

The mice with their nests and urine have almost completely clogged the old filter, resulting in very little air flowing up into the cartridge. Once I removed the filter, the volume of air coming out was superb. The blower operates all the time that the IBM 1130 is powered on, thus it is blowing clean air into any cartridge placed in the drive and exhausting contaminated air out around the heads into the drive compartment. 

I will look for a replacement filter with decent filtering. HEPA filters down below 0.3 microns, ten times finer than the problematic particles for a disk drive. I am not sure I will get a filter as good as the original IBM part but it should do a good enough job filtering air. 

CLEARING DUST OUT OF CARTRIDGES 

The disk cartridges should have all the dust cleared from them before the heads try to load. To accomplish this, the cartridge should first be inserted into a drive but the run switch left off. The blower will be forcing air through the cartridge for all the time it sits in the drive even though the drive motor is off. 

After a suitably long time, the drive should be switched on but turned off before the heads load. Generally this is done with 60 second intervals of run switch activation. I however can block the head loading solenoid from attempting to lower the heads, thus it can spin as long as I want in that state. This will knock off any additional dust and get it out of the cartridge. 

New motor start relay arrived, tested with the blower motor

HOOKED UP THE START RELAY AND TESTED THE BLOWER OPERATION

The new relay didn't pull in the contacts to connect the start winding - it appears it was set for a motor with a heavier draw. I went back to the original, which did pull in but the motor didn't turn when the start windings were energized.

The two sets of windings need enough of a phase difference to impart a starting torque on the motor. As the motor speeds up the current in the main winding declines enough to let the start relay disconnect the start winding. 

I grabbed all the unpolarized capacitors I had and put them in parallel to create a 1.45 uF capacitance. Putting this in series with the start winding did produce the results I wanted. The motor fired up and the start relay energized the start contacts for only a brief moment. The motor reliably started every time I tried it. 

I have ordered a ceiling fan start capacitor, 2.2 uF, which I will install in the disk drive. That should make the blower start every time. 

Adjusting the RK-05 Emulator to my design to emulate a 2310 disk (virtual 2315 disk cartridge)

INPUT AND OUTPUT SIGNAL REQUIREMENTS FIT WITHIN THE KIT'S DESIGN

Because I want this emulator to work with a physical 2310 disk drive, spinning a real cartridge and moving the disk arm, it has to sit between the controller logic in the IBM 1130 and the 2310 disk drive. This means that I need two copies of signals - controller side and disk side - which are routed or replaced by the logic in the FPGA.

Fortunately the 2310 disk interface is simpler, with fewer signals, than an RK-05 which gave me the ability to fit within the existing input and output circuits built onto the board of the RK-05 Emulator kit. In fact, I use all but one of the signals. There are enough of input type and enough of output type for my needs. For example, the sector and index pulses from the 2310 disk drive are inputs to the emulator and are then rebroadcast as outputs to the controller in the 1130. 

The emulator needs to see many of these signals in order to model what the disk drive would be doing if the heads were allowed to fly on the surface to read or write the cartridge in the drive. The sector pulses allow the emulator to rotate the virtual disk platter at the same rate as the physical cartridge is spinning. It watches requests to move the arm in or out and responds to the drive's ready signal when the movement is complete. 

The emulator watches the read gate and write gate signals, requests from the controller to read or write a particular sector on the disk cartridge. The emulator produces the clock and data pulses that would be detected by the disk's read head if the heads were actually down on the surface of the platter. Since we block them from going down, no signals arrive from the physical 2315 cartridge. Instead, we send the read and clock pulses to the controller at the same rate and timing as would occur from the real cartridge. 

For writing, we pass along the clock signal generated by the 2310 drive and let the controller modulate the write clock and data line based on that. Rather than passing it along to the drive to write on the real cartridge, we capture the bits written by the controller and update our cartridge image in DRAM on the RK-05 emulator board. 

MODIFYING THE KIT FOR INTERFACE DIFFERENCES BETWEEN DEC AND IBM

The IBM logic family is based on diode transistor logic (DTL) which means that an input to a gate actually doesn't care what the logic high voltage is, nor even require it. All that matters is that the input will pull current out of the gate down to a low voltage signal, typically logic low of ground voltage. 

The RK-05 has logic families that require a valid high voltage for logic high and a valid low for logic low. The interface chips driving signals to the DEC disk controller in lieu of the physical RK-05 drive are SN74LVC244 chips, which are octal tristate buffers that accommodate the different voltages of the DEC controller (5V) and the FPGA chip (3.3V). 

In part this is due to the DEC disk bus which has multiple RK-05 drives active on a single cable run, all remaining in high impedance mode until they are selected by matching their drive address. At this point, they either emit 5V or 0V to the controller. 

The DTL controller logic in the 1130 only needs to be pulled down to ground to activate it in logic low, otherwise it is left floating. This is best accomplished by the use of open collector gates, thus the voltages in the 1130 are irrelevant to the gate and the gate can operate at the FPGA 3.3V level. The SN74LVC244 chip on the board is a 20 pin SOIC footprint with the meaning of each pin already built into the traces of the PCB.

Fortunately, I found a chip, SN74BCT756, which is a 20 pin SOIC chip with the same pin assignments, one for one, as the original chip in the emulator kit. The new part requires 5V supply rather than the 3.3V of the original chip, requiring me to cut the 3.3V trace to pin 20 of the chip and add bodge wires to deliver 5V instead. 

RECREATING INTERFACE CONNECTOR BOARDS

The interface connector boards could be used as is, simply selecting the wires to connect to the controller logic and to the 2310 drive. Alternatively, I recreated the card from the Gerber files and modified it. First, I created two different cards, one for the drive and one for the controller. Each is customized to only route the signals appropriate for that destination. I also updated the silkscreen labels on the connector pads to reflect the new 2310 signal assignments. 

This would be simply for convenience since the cards from George Wiley will do the job albeit a bit awkwardly. I will finish the designs and see how it prices out. If I can pay a single shipping fee for both cards then it might be cost effective, but for the time being I will go with George's version, which I will order from him right away. 

Finished breadboard testing of 5806223 card replacement for controlling 1627 plotter on IBM 1130

VALIDATED THE PLOTTER READY CIRCUIT

The plotter interface has a -24V line that is sensed to determine if the plotter is connected and turned on. This is connected in a resistor voltage divider with +12V on the other end, producing either +12V or a negative voltage when the plotter is ready. 

I tested the output of my added circuitry which should be delivering safe voltages within the range of a TTL input gate - that is no more than 5V and within the voltage requirements of no more than .8 for low and no less then 2 for high. 

This worked properly in simulation, then checked out fine with twin power supplies and the same circuit on the breadboard. 

VALIDATED THE BEHAVIOR OF FLIPFLOPS AND RESET FOR COMMANDS

Each of the six plotter commands (move left, move right, paper up, paper down, pen up and pen down) set a flipflop to drive the 1627 which should be reset after the proper duration (1.9ms except then pen commands are 50ms).

I found that it wasn't resetting at the point I wanted, but when I made a change everything worked exactly as I desired. Schematic and PCB changed to implement this. 

VALIDATED THE BEHAVIOR OF RESPONSE FLIPFLOP AND INTERRUPT REQUEST

As soon as one of the interval timers goes active for a command, the busy line should go on which turns on the operation response flipflop. That drives the inverted request line for an interrupt on level 3. The flipflop is turned off by a Sense DSW with bit 15 of the B register set to 1. 

This all performed as intended, no changes needed. 

VALIDATED THE BEHAVIOR OF SENSE DSW OPERATIONS

A Sense DSW to our device (area code 5) should gate three status signals out to the IO bus, but leave it undisturbed otherwise. The signals are operation response, timer busy and plotter not ready. 

I installed the same chips and connections onto the breadboard and verified that this works as desired. 

LOCKED IN DESIGN AND SENT PCB OUT TO JLCPCB FOR MANUFACTURE

With this working properly to the best of my ability to test it without the actual 1130 system and 1627 plotter, I committed the design and uploaded it to JLCPCB where it will be fabricated. 

FINALIZED PARTS LIST AND ORDERED ON DIGIKEY

With a final design, I adjusted the cart I had set up in Digikey and ordered a set of components required to build one board. 

Continued breadboard testing of the logic for the replacement controller card for the 1627 plotter connected to an IBM 1130

ADJUSTED COMPONENTS TO ACHIEVE EXACT TIMING REQUIRED

The 1627 plotter requires that the signal lines to command movement of the carriage and the drum be pulled low for specific lengths of time and that the controller maintain the busy state until the plotter is (probably) done with its motion(s). The duration is 1.9ms for the trigger and another 1.9ms until the busy condition goes away. 

The commands to put the pen down on the paper or to raise the pen above the paper surface require a longer trigger and take more time to complete. These two signals need 50ms for trigger and another 50ms to cover the rest of the  mechanical motion. 

I tweaked the capacitor and resistor values until I could see the durations I wanted on my oscilloscope. The shorter duration is achieved on a 74ls122 with a 330 nF capacitor and 18K resistor. The long duration for pen movement requires a 10 uF capacitor and 22K resistor. 

DISCOVERED A MISTAKE IN MY UNDERSTANDING OF THE 74LS122 CHIP BEHAVIOR

The pins for attaching the external timing components are labeled R/Cext, Rint and C so I incorrectly assumed that the resistors go between R/Cext and Rint. That is not correct, Rint is only connected if using the internal resistance rather than an external resistor. Instead, the resistor is attached between R/Cext and the VCC pins. 

WHAT IS VALIDATED AND WHAT REMAINS TO TEST

Pulses are produced reliably and for correct durations. The flipflop that is set when the pulses start is reset at the end of the first duration (1.9 or 50ms), just as with the IBM designed controller card. The triggering only occurs if the bit for that signal is on in the B register when the machines sees an XIO Write for Area 5 and it is clock stage T6. 

I need to put together the logic with a flipflop that is set for Operation Response, to request an interrupt on level 3 and to be reset only when the CPU issues an XIO Sense DSW with B register bit 15 set. 

Also, whenever an XIO Sense DSW is executed, I need to gate the various conditions properly onto the IO Bus so they are visible to the programmer. The busy condition should be passed to bit 14, the operation complete status should be passed to bit 0 and bit 15 should be raised anytime the plotter is not turned on.

The detection of when the plotter is turned on involves receiving the -24V supply voltage from the 1627, which goes through a resistor divider network up to a +12V supply inside the 1130. Thus, when the plotter is not turned on, the circuit sees 12V but drops to a negative voltage when the plotter outputs its -24V. I worked out circuitry to convert this to safe voltages, either near zero or somewhere a bit under 5V when the plotter is not turned on. I have to verify this to be certain that my logic chips won't be damaged by voltages outside of safe ranges.