Another save, final verification complete, board at the fab being manufactured

ZTEX FPGA CONNECTOR SPACING ERROR DETECTED AND FIXED

I measured the actual pin spacing on the FPGA board in my shop and discovered that the diagram I used to space the two 2x32 header strips was wrong. The original diagram was misleading. It had a number of measurements along the edge of the board but no lines down to indicate where they were taken for most of them. 

I moved one connector over and then reconnected all the traces until the board once again passed all design rule checks. Even more proof that a few minutes of extra checking saves weeks of repeat PCB fabrications. 

TEDIOUS FINAL VERIFICATION OF EVERY SIGNAL PATH

I then selected the input and output lines of each and every signal - the screw terminal connectors that run to the 160 pin connector and out to the IBM 1130, as well as the header strip pins that connect the signal into the FPGA board.

This took quite a bit of time, it was helped by asking KiCAD to highlight the entire NET for each signal trace I selected. I could verify that it ran to the correct place. 

I then clicked through the seven components of the receiver circuit, which were essentially identical as I replicated the relative placement and traces for each one. Last, I checked the traces to each 74LS06 chip to ensure that inputs and outputs were correct. 

BOARD RELEASED TO JLCPCB.COM FOR BUILD

JCLPCB is a fab in China with an online ordering portal. I have found them to deliver good quality boards, quickly and at a very reasonable price. This board is four layers and fairly large, thus the cost to build it in four days was $89 US. Shipping by DHL Express will get it to me in less than a week and the whole order was under $130. I will get five copies of the PCB, which I will keep around just in case someone else with an IBM 1130 and a Storage Access Channel feature is looking to build this.