ROUTING BY HAND UNTIL ALL THE CONNECTIONS WERE MADE
I finally had to give up on the purism of retaining one of the inner planes solely for power connections. There were relatively few of them and the challenges of crossing the back and front plane traces grew as I was handling the last dozen signals. I threw in the towel and began to use the inner plane (yellow in the picture below) for signals as well as the +3 and +5 power lines.
The top copper is red, the bottom copper is green and the other inner (ground plane) layer is purple. The outlines around through parts to keep them from connecting to the planes are also shown, which is why there is so much purple visible even though it is a simple poured fill across the entire area. It needs cutouts for all the pins and vias that extend through without connecting to ground.
MANAGING SILKSCREEN LAYER FOR USABILITY
The silkscreen legends will serve two purpose, build-time and wiring-time. I created them to assist both stages. Quite a few parts do NOT need a silkscreen legend. Others, particularly resistor values, are essential for building. When wiring, the connector name and 1130 signal name will be quite helpful if I can fit them both on the board.
VERIFICATION TO BE SURE IT IS READY FOR PRODUCTION
I have a number of verification steps ahead before I send this off to the fab for manufacturing.
- Check the FPGA connector layout carefully against the board
- Check the FPGA connector pins against my header pins
- Check the screw terminal parts for clearance next to each other
- Check the ATX-24 power supply connector for proper connections
- Trace each and every signal to ensure it goes between the points I expect
- Check legibility and correctness of the silkscreen text
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