Did some initial diagnostic work to zoom in on the problem of my 1442 punch allowing the punches for rows 4 to 8 to be activated on every rotation of the motor - thus randomly lacing cards passing through the punch station during an NPRO.
I tried with my SAC Interface box powered down - same results. This means it is not my logic injecting bits into the machine. I checked the secureness of the main signals cable where it attaches to the 1131 - looked fine. I did try to feel for a magnetic field during operation, using a screwdriver near the punch solenoids, but no luck with that.
I looked over the logic diagrams for the SLT cards inside the 1442, to see if there was a common card for just those five rows. That did not pan out. Next, I looked at my ALDs for the adapter logic inside the 1131, to see if there is a common card that might explain this symptom. Nothing fit the symptoms there either.
I moved on to the mechanical adjustments and checks. I soon came to realize that the magnet assembly mounting screws were loose and the assembly was skewed away from the bottom row punches. I tweaked this and tightened it down so that no punches were activated on NPRO cycles. I may have to play a bit with it to ensure that all desired holes do get punched, but for now it is good.
Next up, I have to face the puzzling symptoms - I only saw rows 4 to 8 punch but from the top I can see that the interposer is active for row 9 as well, but the cards didn't have that column punched. Right now, I have a small wedge of card that tore off in the punch station area which I have to clear before I can go back to my tests and adjustments, but I am moving forward nicely.
It appears that the wedge is not a piece of card, but a stuck punch - perhaps the row 0 - with the interposers and remaining mechanisms unactivated it is stuck down. I will have to figure out how to deal with this, hopefully without having to remove the punch unit and disassemble it.
CORE MEMORY EXPANSION TO 32K WORDS
I received my EMM 32K x 18bit core memory module today and immediately ordered the +15V, -15V and +5V power supplies needed to use it. I will set up a quickie FPGA design to drive and test the core memory in various ways - timing, bit retention, holding various patterns. In the interim I can plan out the way I would interface to this core from the 1130, design circuits, layout the implementation and the rest of what I need to make this work.
I received my EMM 32K x 18bit core memory module today and immediately ordered the +15V, -15V and +5V power supplies needed to use it. I will set up a quickie FPGA design to drive and test the core memory in various ways - timing, bit retention, holding various patterns. In the interim I can plan out the way I would interface to this core from the 1130, design circuits, layout the implementation and the rest of what I need to make this work.
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