I took a bit of plastic off the restored section of the punch wheel, so that when I coat it with a slurry of course tumbling grit it should end up at the target diameter. I picked up some 1/4 millimeter sized silicon carbide grit which will give the wheel the same quality of 'grab' on punched card stock as the original ceramic material on the undamaged portion of the wheel.
My grit will arrive on Saturday evening and by Sunday I expect to have the wheel completed, ready for reinstallation. Since it has been so long since I disassembled the punch, I will have to work carefully from exploded parts diagrams, maintenance manual pictures and some interpolation in order to get the unit back together properly.
ADDITIONAL CORE MEMORY TO EXPAND 1130 CONFIGURATION
I came across a nice looking core memory card on ebay and purchased it. A 32K by 18 bit core that operations at up to 950ns read-modify-rewrite cycle time. The 1130 is a 16 bit word with two parity bits - thus 18 bits is a perfect fit.
An 1130 can address a max of 32768 words of memory and my machine has 16384 words installed. This one card can provide the entire memory needs of the 1130 and I can use half of it to expand out my system to max configuration.
The 1130 operates with one of two memory speeds - 3.6us or 2.2us - and the one I have is the slower 3.6us version. Using a 0.95us memory will easily fit in the much longer cycle time of the 1130.
There are two levels of complication in adding in this memory, assuming I worked out the interface electronics, power and mechanical details. The first challenges arise when I increase the machine to a 32K 3.6us configuration. The additional challenges will arise if I tried to use this module to convert the machine to a 32K 2.2us configuration, disabling the original core memory in favor of this card.
In either case, I would need to add circuitry to support the additional addressing - addressing registers were built with only 14 bits of address, output lines from adders and other registers that might receive addresses were set up with only 14 bits, and there may be other places were IBM omitted the signal traces, flipflops and gates needed for 15 bit addresses. The motherboard as well as SLT cards might be different in a 64K system, to provide for the extra address bit.
Spare gates and flipflops might be on the installed cards, the appropriate signal traces may be on the backplane and everything I need could be present so that all I need is the address decoding for the extra bit and the interface logic to interpose the new memory in the current system. However, seeing how different the ALDs are for different 1130 instances, I doubt it would be this clean and easy.
Detailed investigation would be needed to assess the addressing state of the machine as it sits, the operational state of the extra bit for any that are already in the machine, and then create a plan to address any gaps. Might be addition of wirewrap signals on the backplane, but it could be as complex as building an entire shadow register or logical unit in order to generate and deliver the needed high order address bit.
The second case involves timing sensitive changes that were made on 2.2us machines to work properly with the faster memory. I don't have those circuits and might need to do some significant rework, add in some circuitry of my own, and potentially debug timing issues because of the Frankenstein nature of this approach.
I will investigate the first case, expanding to a 32K word 3.6us configuration, but have decided against the much higher risk alternative of a 2.2us system. I could, however, add in some extensions to the architecture, bank switching memory under control of currently unassigned op codes. That would be fun but requires quite a bit of change to both the 1130 and the disk monitor system software. Next year, if ever.
RESTORING CALCOMP 565 AS IBM 1627 PLOTTER
Still nothing from the metalworker and nothing from the designer of the replacement pen assembly.