Decoded the I/O error trying to load the flash of the IOB6120

ERROR 1050 DURING ATTEMPT TO WRITE FIRST BLOCK TO FLASH

When I issued the FL command to load the flash and began feeding it lines of data through the console, at the end of the first block when it compared the checksum successfully, it then failed with an error 1050. I first looked into the source code for the FL command and discovered two things. First, codes of the form 1xxx are failures to do the block erase that occurs before the data write. Second, the three octal characters are the status byte returned. 

SHARP DOCUMENTATION SHOWS THE MEANING OF THE STATUS BYTE

I looked over the documentation on the flash chip I used and found that the error byte 050 octal means two things - block erase failed and the Vccw level was too low. This chip gets two VCC inputs, the regular +5V and a second level which if not at 5V will block any writes/changes. Think of it as the write protect tab of a floppy disk. If I take this at face value, then the failure was due to a low voltage on pin 37 (the Vccw pin). 

LIKELY CAUSES TO BE INVESTIGATED

I checked the gerber files and there is indeed a connection between the VCC pin (13) and the Vccw pin (37), involving a bottom layer trace, two vias and short top layer traces to the pads. 

• One possible failure mode is a break or bad via. 
• Another is an issue with the Vccw pin either not being firmly soldered or being shorted to an adjacent pin. 
• A third area of concern is my modification very near to that pin, where I added a pullup resistor to the continuation of the trace after +5 reaches pin 37, over to the chip enable line for flash. 
• A fourth possibility is that this is indeed a counterfeit chip, being some other similar flash with changed markings
• A fifth possibility is that the chip itself is failing.

When I bought this chip, I received four in the package thus I can deal with the last possibility easily. Some diagnosis is required, plus careful inspection and perhaps a reflow of pin 37 while I am there. 

Another possible issue for me to consider is the solder bridging I added for the two additional address pins that don't exist on the original chip for which the board is designed. Rather than taking them to logic low, I tied them to adjacent address bits. That may, however, cause odd problems so I think I will rework this to use jumpers to ground instead. For example, I see at least one of the bits is used to address 'boot and parameter blocks'.