FPGA coding continues, some testing, as the Virtual 2315 Cartridge facility is being built

WORKING AROUND VISITING FRIENDS

Once again we have a good friend visiting us and that consumes almost all my time. Still, there are moments when I can build up and verify portions of the FPGA logic that will directly connect to the disk drive in the 1130 and be driven by the Arduino to load and unload virtual cartridge images. 

NEW BOARD, NEW DEVICES, NEW TOOLCHAIN - LOTS OF LEARNING CURVE

The Xilinx toolchain I had used for prior projects was ISE, but it has been supplanted by the new and more powerful Vivado. Unfortunately, with every improvement comes change and in some cases, loss of features. 

ISE would create an instantiation template for any module, so that you could easily plug in the component declaration and the instantiation into a project that would call the module. Not so with Vivado, although I did find a user contributed script lately that gives me roughly the same result. 

The more extensive learning curveI face is due to the change from one FPGA board to another, each introducing new devices on the board and configuration issues. Even using IP like a FIFO has wrinkles on a different FPGA chip and board. Switching from SRAM to DDR3 RAM is more involved and by far the largest generator of extra hours in this project.

SECTIONS ARE EASY TO VALIDATE WITH SIMULATION

A major share of the logic in this design involves tracking the physical disk drive to model exactly where the disk head will be at any moment. We need to shadow the arm movements to determine the current cylinder, watch the head signal to ascertain whether the upper or lower head is activated, and synchronize to the sector and index marker pulses to identify the exact spot that is rotating under a head. 

All of that is easy to simulate, simply injecting various arm movement pulses and marker pulses while watching the output of the logic generating the cylinder, head, sector, word and bit positions. Once that is correct the logic can be watched that produces the raw bits that are coming reading the virtual disk cartridge and that record the written bits which are intended to be written on the cartridge.