PROBLEMS WITH SPL UNDOUBTEDLY DUE TO ONE OR MORE OF THESE
There is a subset of all the U-Boot configuration choices that affect the preloader (SPL) and that is where I will concentrate since we don't get even the first welcome banner from SPL. Here is the list for one of the U-boot versions I am working with:
#define CONFIG_ARCH_EARLY_INIT_R 1
#define CONFIG_ARCH_FIXUP_FDT_MEMORY 1
#define CONFIG_ARCH_MISC_INIT 1
#define CONFIG_ARCH_SOCFPGA 1
#define CONFIG_ARCH_SUPPORTS_LTO 1
#define CONFIG_ARM 1
#define CONFIG_ARM_ASM_UNIFIED 1
#define CONFIG_ARP_TIMEOUT 5000
#define CONFIG_AUTOBOOT 1
#define CONFIG_AUTO_COMPLETE 1
#define CONFIG_BAUDRATE 115200
#define CONFIG_BLK 1
#define CONFIG_BLOCK_CACHE 1
#define CONFIG_BOARDDIR board/terasic/de10-nano
#define CONFIG_BOOTDELAY 2
#define CONFIG_BOOTDEV_ETH 1
#define CONFIG_BOOTM_EFI 1
#define CONFIG_BOOTMETH_DISTRO 1
#define CONFIG_BOOTMETH_DISTRO_PXE 1
#define CONFIG_BOOTMETH_EFILOADER 1
#define CONFIG_BOOTMETH_GLOBAL 1
#define CONFIG_BOOTMETH_VBE 1
#define CONFIG_BOOTMETH_VBE_SIMPLE 1
#define CONFIG_BOOTM_LINUX 1
#define CONFIG_BOOTM_NETBSD 1
#define CONFIG_BOOTM_PLAN9 1
#define CONFIG_BOOTM_RTEMS 1
#define CONFIG_BOOTM_VXWORKS 1
#define CONFIG_BOOTP_BOOTPATH 1
#define CONFIG_BOOTP_DNS 1
#define CONFIG_BOOTP_GATEWAY 1
#define CONFIG_BOOTP_HOSTNAME 1
#define CONFIG_BOOTP_MAX_ROOT_PATH_LEN 64
#define CONFIG_BOOTP_PXE 1
#define CONFIG_BOOTP_PXE_CLIENTARCH 0x15
#define CONFIG_BOOTP_SUBNETMASK 1
#define CONFIG_BOOTP_VCI_STRING "U-Boot.armv7"
#define CONFIG_BOOTSTAGE_STASH_ADDR 0x0
#define CONFIG_BOOTSTAGE_STASH_SIZE 0x1000
#define CONFIG_BOOTSTD 1
#define CONFIG_BOUNCE_BUFFER 1
#define CONFIG_BUILD_TARGET "u-boot-with-spl.sfp"
#define CONFIG_CACHE 1
#define CONFIG_CADENCE_QSPI 1
#define CONFIG_CC_HAS_ASM_INLINE 1
#define CONFIG_CC_IS_GCC 1
#define CONFIG_CC_OPTIMIZE_FOR_SIZE 1
#define CONFIG_CHARSET 1
#define CONFIG_CLANG_VERSION 0
#define CONFIG_CLOCKS 1
#define CONFIG_CMD_ASKENV 1
#define CONFIG_CMD_BDI 1
#define CONFIG_CMD_BLOCK_CACHE 1
#define CONFIG_CMD_BOOTD 1
#define CONFIG_CMD_BOOTEFI 1
#define CONFIG_CMD_BOOTEFI_BOOTMGR 1
#define CONFIG_CMD_BOOTEFI_HELLO_COMPILE 1
#define CONFIG_CMD_BOOTFLOW 1
#define CONFIG_CMD_BOOTM 1
#define CONFIG_CMD_BOOTP 1
#define CONFIG_CMD_BOOTZ 1
#define CONFIG_CMD_CACHE 1
#define CONFIG_CMD_CONSOLE 1
#define CONFIG_CMD_CRC32 1
#define CONFIG_CMD_DFU 1
#define CONFIG_CMD_DHCP 1
#define CONFIG_CMD_DM 1
#define CONFIG_CMD_ECHO 1
#define CONFIG_CMD_EDITENV 1
#define CONFIG_CMD_ELF 1
#define CONFIG_CMD_ENV_EXISTS 1
#define CONFIG_CMD_EXPORTENV 1
#define CONFIG_CMD_EXT2 1
#define CONFIG_CMD_EXT4 1
#define CONFIG_CMD_EXT4_WRITE 1
#define CONFIG_CMD_FAT 1
#define CONFIG_CMD_FDT 1
#define CONFIG_CMD_FPGA 1
#define CONFIG_CMD_FS_GENERIC 1
#define CONFIG_CMD_GO 1
#define CONFIG_CMD_GPIO 1
#define CONFIG_CMD_GREPENV 1
#define CONFIG_CMD_I2C 1
#define CONFIG_CMD_IMI 1
#define CONFIG_CMD_IMPORTENV 1
#define CONFIG_CMD_ITEST 1
#define CONFIG_CMDLINE 1
#define CONFIG_CMDLINE_EDITING 1
#define CONFIG_CMD_LOADB 1
#define CONFIG_CMD_LOADS 1
#define CONFIG_CMD_MDIO 1
#define CONFIG_CMD_MEMORY 1
#define CONFIG_CMD_MII 1
#define CONFIG_CMD_MMC 1
#define CONFIG_CMD_MTDPARTS 1
#define CONFIG_CMD_NET 1
#define CONFIG_CMD_NFS 1
#define CONFIG_CMD_PART 1
#define CONFIG_CMD_PING 1
#define CONFIG_CMD_PXE 1
#define CONFIG_CMD_RANDOM 1
#define CONFIG_CMD_RUN 1
#define CONFIG_CMD_SAVEENV 1
#define CONFIG_CMD_SETEXPR 1
#define CONFIG_CMD_SF 1
#define CONFIG_CMD_SLEEP 1
#define CONFIG_CMD_SOURCE 1
#define CONFIG_CMD_SPI 1
#define CONFIG_CMD_SYSBOOT 1
#define CONFIG_CMD_TFTPBOOT 1
#define CONFIG_CMD_USB 1
#define CONFIG_CMD_USB_MASS_STORAGE 1
#define CONFIG_CMD_XIMG 1
#define CONFIG_COUNTER_FREQUENCY 0
#define CONFIG_CPU_V7A 1
#define CONFIG_CRC32 1
#define CONFIG_CRC32_VERIFY 1
#define CONFIG_CREATE_ARCH_SYMLINK 1
#define CONFIG_CUSTOM_SYS_INIT_SP_ADDR 0x800000
#define CONFIG_DEFAULT_DEVICE_TREE "socfpga_cyclone5_de10_nano"
#define CONFIG_DEFAULT_FDT_FILE "socfpga_cyclone5_de10_nano.dtb"
#define CONFIG_DEFAULT_SPI_BUS 0
#define CONFIG_DEFAULT_SPI_MODE 0x0
#define CONFIG_DESIGNWARE_SPI 1
#define CONFIG_DESIGNWARE_WATCHDOG 1
#define CONFIG_DEVICE_TREE_INCLUDES ""
#define CONFIG_DFU 1
#define CONFIG_DFU_MMC 1
#define CONFIG_DFU_OVER_USB 1
#define CONFIG_DISPLAY_BOARDINFO 1
#define CONFIG_DISPLAY_CPUINFO 1
#define CONFIG_DISTRO_DEFAULTS 1
#define CONFIG_DM 1
#define CONFIG_DM_DEVICE_REMOVE 1
#define CONFIG_DM_DEV_READ_INLINE 1
#define CONFIG_DM_ETH 1
#define CONFIG_DM_EVENT 1
#define CONFIG_DM_GPIO 1
#define CONFIG_DM_I2C 1
#define CONFIG_DM_MMC 1
#define CONFIG_DM_RESET 1
#define CONFIG_DM_SEQ_ALIAS 1
#define CONFIG_DM_SERIAL 1
#define CONFIG_DM_SPI 1
#define CONFIG_DM_SPI_FLASH 1
#define CONFIG_DM_USB 1
#define CONFIG_DM_WARN 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_DW_ALTDESCRIPTOR 1
#define CONFIG_DWAPB_GPIO 1
#define CONFIG_DW_WDT_CLOCK_KHZ 25000
#define CONFIG_EFI_DEVICE_PATH_TO_TEXT 1
#define CONFIG_EFI_DEVICE_PATH_UTIL 1
#define CONFIG_EFI_DT_FIXUP 1
#define CONFIG_EFI_EBBR_2_0_CONFORMANCE 1
#define CONFIG_EFI_ECPT 1
#define CONFIG_EFI_GRUB_ARM32_WORKAROUND 1
#define CONFIG_EFI_LOADER 1
#define CONFIG_EFI_LOADER_HII 1
#define CONFIG_EFI_LOAD_FILE2_INITRD 1
#define CONFIG_EFI_PLATFORM_LANG_CODES "en-US"
#define CONFIG_EFI_SETUP_EARLY 1
#define CONFIG_EFI_UNICODE_CAPITALIZATION 1
#define CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2 1
#define CONFIG_EFI_VAR_BUF_SIZE 16384
#define CONFIG_EFI_VARIABLE_FILE_STORE 1
#define CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK 1
#define CONFIG_ENV_IS_IN_MMC 1
#define CONFIG_ENV_MAX_ENTRIES 512
#define CONFIG_ENV_MIN_ENTRIES 64
#define CONFIG_ENV_OFFSET 0x4400
#define CONFIG_ENV_SIZE 0x2000
#define CONFIG_ENV_SOURCE_FILE ""
#define CONFIG_ENV_SUPPORT 1
#define CONFIG_ENV_VARS_UBOOT_CONFIG 1
#define CONFIG_ERR_PTR_OFFSET 0xfffec000
#define CONFIG_ETH 1
#define CONFIG_ETH_DESIGNWARE 1
#define CONFIG_ETH_DESIGNWARE_SOCFPGA 1
#define CONFIG_EVENT 1
#define CONFIG_EVENT_DYNAMIC 1
#define CONFIG_EXPERT 1
#define CONFIG_EXT4_WRITE 1
#define CONFIG_FAT_WRITE 1
#define CONFIG_FIT 1
#define CONFIG_FIT_EXTERNAL_OFFSET 0x0
#define CONFIG_FIT_FULL_CHECK 1
#define CONFIG_FIT_PRINT 1
#define CONFIG_FPGA 1
#define CONFIG_FPGA_ALTERA 1
#define CONFIG_FPGA_SOCFPGA 1
#define CONFIG_FS_EXT4 1
#define CONFIG_FS_FAT 1
#define CONFIG_FS_FAT_MAX_CLUSTSIZE 65536
#define CONFIG_GCC_VERSION 110201
#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
#define CONFIG_GENERATE_SMBIOS_TABLE 1
#define CONFIG_GICV2 1
#define CONFIG_GPIO 1
#define CONFIG_GPIO_EXTRA_HEADER 1
#define CONFIG_GZIP 1
#define CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR 1
#define CONFIG_HASH 1
#define CONFIG_HAS_THUMB2 1
#define CONFIG_HAS_VBAR 1
#define CONFIG_HAVE_BLOCK_DEVICE 1
#define CONFIG_HAVE_PRIVATE_LIBGCC 1
#define CONFIG_HAVE_SYS_TEXT_BASE 1
#define CONFIG_HUSH_PARSER 1
#define CONFIG_I2C 1
#define CONFIG_IDENT_STRING ""
#define CONFIG_IMX_CONTAINER_CFG ""
#define CONFIG_IMX_DCD_ADDR 0x00910000
#define CONFIG_INPUT 1
#define CONFIG_L2X0_CACHE 1
#define CONFIG_LEGACY_IMAGE_FORMAT 1
#define CONFIG_LIB_ELF 1
#define CONFIG_LIB_RAND 1
#define CONFIG_LIB_UUID 1
#define CONFIG_LINKER_LIST_ALIGN 4
#define CONFIG_LMB 1
#define CONFIG_LMB_MAX_REGIONS 8
#define CONFIG_LMB_USE_MAX_REGIONS 1
#define CONFIG_LOCALVERSION ""
#define CONFIG_LOCALVERSION_AUTO 1
#define CONFIG_LOGLEVEL 4
#define CONFIG_MD5 1
#define CONFIG_MENU 1
#define CONFIG_MII 1
#define CONFIG_MKIMAGE_DTC_PATH "dtc"
#define CONFIG_MMC 1
#define CONFIG_MMC_DW 1
#define CONFIG_MMC_DW_SOCFPGA 1
#define CONFIG_MMC_HW_PARTITIONING 1
#define CONFIG_MMC_QUIRKS 1
#define CONFIG_MMC_VERBOSE 1
#define CONFIG_MMC_WRITE 1
#define CONFIG_MTD 1
#define CONFIG_MTDIDS_DEFAULT "nor0=ff705000.spi.0"
#define CONFIG_MTDPARTS_DEFAULT ""
#define CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ 0x8000
#define CONFIG_NET 1
#define CONFIG_NETDEVICES 1
#define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_NET_TFTP_VARS 1
#define CONFIG_NFS_TIMEOUT 2000
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_OF_CONTROL 1
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_LIBFDT_ASSUME_MASK 0x0
#define CONFIG_OF_LIST "socfpga_cyclone5_de10_nano"
#define CONFIG_OF_REAL 1
#define CONFIG_OF_SEPARATE 1
#define CONFIG_OF_SPL_REMOVE_PROPS "pinctrl-0 pinctrl-names clocks clock-names interrupt-parent interrupts"
#define CONFIG_OF_TRANSLATE 1
#define CONFIG_PARTITIONS 1
#define CONFIG_PARTITION_UUIDS 1
#define CONFIG_PHY_GIGE 1
#define CONFIG_PHYLIB 1
#define CONFIG_PHY_MICREL 1
#define CONFIG_PHY_MICREL_KSZ90X1 1
#define CONFIG_PHY_RESET_DELAY 0
#define CONFIG_PLATFORM_ELFENTRY "_start"
#define CONFIG_POWER 1
#define CONFIG_PRINTF 1
#define CONFIG_PXE_UTILS 1
#define CONFIG_RAM 1
#define CONFIG_REGEX 1
#define CONFIG_REGMAP 1
#define CONFIG_REQUIRE_SERIAL_CONSOLE 1
#define CONFIG_RESET_SOCFPGA 1
#define CONFIG_SAVEENV 1
#define CONFIG_SDP_LOADADDR 0x0
#define CONFIG_SERIAL 1
#define CONFIG_SERIAL_PRESENT 1
#define CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS 100
#define CONFIG_SF_DEFAULT_BUS 0
#define CONFIG_SF_DEFAULT_CS 0
#define CONFIG_SF_DEFAULT_MODE 0x0
#define CONFIG_SF_DEFAULT_SPEED 1000000
#define CONFIG_SHA1 1
#define CONFIG_SHA256 1
#define CONFIG_SIMPLE_BUS 1
#define CONFIG_SPI 1
#define CONFIG_SPI_FLASH 1
#define CONFIG_SPI_FLASH_MTD 1
#define CONFIG_SPI_FLASH_SMART_HWCAPS 1
#define CONFIG_SPI_FLASH_UNLOCK_ALL 1
#define CONFIG_SPI_FLASH_USE_4K_SECTORS 1
#define CONFIG_SPI_MEM 1
#define CONFIG_SPL 1
#define CONFIG_SPL_ALTERA_SDRAM 1
#define CONFIG_SPL_BANNER_PRINT 1
#define CONFIG_SPL_BLK 1
#define CONFIG_SPL_BUILD 1
#define CONFIG_SPL_CACHE 1
#define CONFIG_SPL_CRC32 1
#define CONFIG_SPL_DM 1
#define CONFIG_SPL_DM_I2C 1
#define CONFIG_SPL_DM_INLINE_OFNODE 1
#define CONFIG_SPL_DM_MMC 1
#define CONFIG_SPL_DM_RESET 1
#define CONFIG_SPL_DM_SERIAL 1
#define CONFIG_SPL_DM_SPI 1
#define CONFIG_SPL_DM_SPI_FLASH 1
#define CONFIG_SPL_DM_USB 1
#define CONFIG_SPL_DOS_PARTITION 1
#define CONFIG_SPL_FRAMEWORK 1
#define CONFIG_SPL_IMAGE "spl/u-boot-spl.bin"
#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
#define CONFIG_SPL_LEGACY_IMAGE_FORMAT 1
#define CONFIG_SPL_LIBCOMMON_SUPPORT 1
#define CONFIG_SPL_LIBDISK_SUPPORT 1
#define CONFIG_SPL_LIBGENERIC_SUPPORT 1
#define CONFIG_SPL_LOGLEVEL 4
#define CONFIG_SPL_MAX_SIZE 0x0
#define CONFIG_SPL_MMC 1
#define CONFIG_SPL_NO_BSS_LIMIT 1
#define CONFIG_SPL_OF_CONTROL 1
#define CONFIG_SPL_OF_LIBFDT 1
#define CONFIG_SPL_OF_LIBFDT_ASSUME_MASK 0xff
#define CONFIG_SPL_OF_LIST "socfpga_cyclone5_de10_nano"
#define CONFIG_SPL_OF_REAL 1
#define CONFIG_SPL_PAD_TO 0x10000
#define CONFIG_SPL_PARTITIONS 1
#define CONFIG_SPL_PAYLOAD "u-boot.bin"
#define CONFIG_SPL_PRINTF 1
#define CONFIG_SPL_RAM 1
#define CONFIG_SPL_RAM_DEVICE 1
#define CONFIG_SPL_RAM_SUPPORT 1
#define CONFIG_SPL_RAW_IMAGE_SUPPORT 1
#define CONFIG_SPL_SERIAL 1
#define CONFIG_SPL_SERIAL_PRESENT 1
#define CONFIG_SPL_SHA1 1
#define CONFIG_SPL_SHA256 1
#define CONFIG_SPL_SIMPLE_BUS 1
#define CONFIG_SPL_SIZE_LIMIT 0x10000
#define CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK 0x200
#define CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD 1
#define CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC 1
#define CONFIG_SPL_SPI 1
#define CONFIG_SPL_SPI_FLASH_SUPPORT 1
#define CONFIG_SPL_SPI_FLASH_TINY 1
#define CONFIG_SPL_SPI_LOAD 1
#define CONFIG_SPL_SPRINTF 1
#define CONFIG_SPL_STACK 0x0
#define CONFIG_SPL_STACK_R 1
#define CONFIG_SPL_STACK_R_ADDR 0x00800000
#define CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN 0x100000
#define CONFIG_SPL_STRTO 1
#define CONFIG_SPL_SYS_MALLOC_F_LEN 0x800
#define CONFIG_SPL_SYS_MALLOC_SIMPLE 1
#define CONFIG_SPL_SYSRESET 1
#define CONFIG_SPL_SYS_STACK_F_CHECK_BYTE 0xaa
#define CONFIG_SPL_SYS_THUMB_BUILD 1
#define CONFIG_SPL_TARGET ""
#define CONFIG_SPL_TEXT_BASE 0xFFFF0000
#define CONFIG_SPL_USE_ARCH_MEMCPY 1
#define CONFIG_SPL_USE_ARCH_MEMSET 1
#define CONFIG_SPL_USE_TINY_PRINTF 1
#define CONFIG_SPL_WATCHDOG 1
#define CONFIG_SPRINTF 1
#define CONFIG_STACK_SIZE 0x1000000
#define CONFIG_STRTO 1
#define CONFIG_SUPPORT_ACPI 1
#define CONFIG_SUPPORT_OF_CONTROL 1
#define CONFIG_SUPPORT_RAW_INITRD 1
#define CONFIG_SUPPORT_SPL 1
#define CONFIG_SYS_ARCH "arm"
#define CONFIG_SYS_ARM_ARCH 7
#define CONFIG_SYS_ARM_CACHE_CP15 1
#define CONFIG_SYS_ARM_CACHE_WRITEBACK 1
#define CONFIG_SYS_ARM_MMU 1
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_SYS_BOARD "de10-nano"
#define CONFIG_SYS_BOOTM_LEN 0x800000
#define CONFIG_SYS_BOOT_RAMDISK_HIGH 1
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_SYS_CACHE_SHIFT_6 1
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_CLK_FREQ 0
#define CONFIG_SYSCON 1
#define CONFIG_SYS_CONFIG_NAME "socfpga_de10_nano"
#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE 1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 1
#define CONFIG_SYS_CPU "armv7"
#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1000000
#define CONFIG_SYS_DFU_MAX_FILE_SIZE 0x1000000
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 0
#define CONFIG_SYS_FDT_PAD 0x3000
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_I2C_BUS_MAX 4
#define CONFIG_SYS_I2C_DW 1
#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
#define CONFIG_SYS_INIT_RAM_SIZE SOCFPGA_PHYS_OCRAM_SIZE
#define CONFIG_SYS_L2_PL310
#define CONFIG_SYS_LOAD_ADDR 0x01000000
#define CONFIG_SYS_LONGHELP 1
#define CONFIG_SYS_MALLOC_CLEAR_ON_INIT 1
#define CONFIG_SYS_MALLOC_F 1
#define CONFIG_SYS_MALLOC_F_LEN 0x2000
#define CONFIG_SYS_MALLOC_LEN 0x4000000
#define CONFIG_SYS_MAXARGS 32
#define CONFIG_SYS_MEM_TOP_HIDE 0x0
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMC_ENV_PART 0
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 256
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET 0x0
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 0x1
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE 0xa2
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION 1
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE 1
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR 1
#define CONFIG_SYS_NS16550 1
#define CONFIG_SYS_PBSIZE 1044
#define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS
#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_RELOC_GD_ENV_ADDR 1
#define CONFIG_SYSRESET 1
#define CONFIG_SYSRESET_CMD_RESET 1
#define CONFIG_SYSRESET_SOCFPGA 1
#define CONFIG_SYS_RX_ETH_BUFFER 4
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_SOC "socfpga"
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
#define CONFIG_SYS_SRAM_BASE 0x0
#define CONFIG_SYS_SRAM_SIZE 0x0
#define CONFIG_SYS_TEXT_BASE 0x01000040
#define CONFIG_SYS_THUMB_BUILD 1
#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
#define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_TIMER_RATE 25000000
#define CONFIG_SYS_VENDOR "terasic"
#define CONFIG_SYS_XTRACE 1
#define CONFIG_TARGET_SOCFPGA_CYCLONE5 1
#define CONFIG_TARGET_SOCFPGA_GEN5 1
#define CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO 1
#define CONFIG_TFTP_BLOCKSIZE 1468
#define CONFIG_TFTP_WINDOWSIZE 1
#define CONFIG_TIMESTAMP 1
#define CONFIG_TOOLS_CRC32 1
#define CONFIG_TOOLS_FIT 1
#define CONFIG_TOOLS_FIT_FULL_CHECK 1
#define CONFIG_TOOLS_FIT_PRINT 1
#define CONFIG_TOOLS_FIT_RSASSA_PSS 1
#define CONFIG_TOOLS_FIT_SIGNATURE 1
#define CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE 0x10000000
#define CONFIG_TOOLS_FIT_VERBOSE 1
#define CONFIG_TOOLS_LIBCRYPTO 1
#define CONFIG_TOOLS_MD5 1
#define CONFIG_TOOLS_OF_LIBFDT 1
#define CONFIG_TOOLS_SHA1 1
#define CONFIG_TOOLS_SHA256 1
#define CONFIG_TOOLS_SHA384 1
#define CONFIG_TOOLS_SHA512 1
#define CONFIG_USB 1
#define CONFIG_USB_DWC2 1
#define CONFIG_USB_DWC2_BUFFER_SIZE 64
#define CONFIG_USB_FUNCTION_MASS_STORAGE 1
#define CONFIG_USB_GADGET 1
#define CONFIG_USB_GADGET_DOWNLOAD 1
#define CONFIG_USB_GADGET_DUALSPEED 1
#define CONFIG_USB_GADGET_DWC2_OTG 1
#define CONFIG_USB_GADGET_MANUFACTURER "terasic"
#define CONFIG_USB_GADGET_PRODUCT_NUM 0xa4a5
#define CONFIG_USB_GADGET_VBUS_DRAW 2
#define CONFIG_USB_GADGET_VENDOR_NUM 0x0525
#define CONFIG_USB_HOST 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_USE_ARCH_MEMCPY 1
#define CONFIG_USE_ARCH_MEMSET 1
#define CONFIG_USE_PRIVATE_LIBGCC 1
#define CONFIG_VERSION_VARIABLE 1
#define CONFIG_WATCHDOG_TIMEOUT_MSECS 10000
#define CONFIG_ZLIB 1
The documentation for these parameters is only the source code itself. No documentation for U-boot and SPL to describe what these do and how to select the appropriate choices. Anyone see the one(s) that are incorrect?? Let me know.
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