Friday, July 8, 2016

SAC Interface new GUI - virtual 2501 and core memory load working so far

XEROX ALTO RESTORATION - PLANNING DISK EMULATOR/DRIVER

There is a need to have a device that can either take the place of a Diablo 31 drive, to deliver PC based disk images to a real Alto, or read and write on a real Diablo drive with the disk image sitting on a PC. This requires quite a few I/O connectors.

I chose to use one of my Digilent Nexys2 boards, a Spartan 3e based FPGA development board which has enough I/O pins for two interfaces - a pretend disk drive and a pretend controller card. It features 16MB of onboard DRAM and 16MB of onboard flash, a USB link to a PC, VGA, keyboard, mouse, serial port and a variety of switch, LED and display components.

These boards use an FX2 high density connector for the IO fanout, fitting to a Digilent provided card that allows easy wiring to the external connectors I need to use. I ordered the fanout card and will be developing logic for the Nexys2 while I wait for the parts to arrive.

SAC INTERFACE FOR ADDING PERIPHERALS TO THE 1130

Restructuring the GUI

I resumed testing of the 2501 reader functionality, after making some fixes to the sense DSW result logic and adding other diagnostic outputs I need not only to test this device but to start on a few others.

My last card status worked well for both 029 and binary mode files, as does the reading operation itself. My busy status is a bit odd, still, but otherwise the core 2501 function now works. I began by investigating my logic for presenting the busy bits.

On reflection, however, I decided that the busy status is indeed correct. DSW bits 14 and 15 stand for, respectively, busy and busy/not ready. The busy bit goes away when the read is done and the interrupt triggered, thus I should only see DSW bit 15 on, not bit 14.

I am debugging doing a Program Load from the 2501 (boot mode) now. After a few small tweaks, it correctly loads a binary mode card into core in the special boot mode format, ready for execution. I then added the trigger to ask my hardware state machine to push, in sequence, IMM STOP, RESET, and START which will reset the machine and set the IAR to 0000, the first word of the card image loaded, then starts execution just as the Prog Load button would have done.

It worked perfectly. The 2501 is complete. Next up, I will debug the mirror 1053 console printer device. The first cut at the function led to timeouts in the transactional link, once I put virtual paper in the mirror 1053 and began typing characters. I am going to need to study the logic on both side and install some diagnostic outputs in order to trace this down. This function is complicated because it has a FIFO buffer in the FPGA and logic to asynchronously drain the buffer. Plenty can go wrong.

Next up was to work on the core load function, which takes a core image file on the PC and loads it into the core memory of the 1130. Most worked cleanly once I coded it up, but I did have a spat with wxPython over the pop up dialog box to inform the user of the IAR setting where execution should begin. It is a very simple function and was soon working as intended.

I chose to work on the virtual 2310 disk drive next. It should be straightforward and easy to wrap up. Au contraire, it didn't seem to be active at all. I loaded both the DCIP standalone utility and the disk diagnostic routine into core, but neither could see any sign of life from my virtual 2310. I will need to festoon the FPGA with diagnostic LEDs, toss in some tracing messages in the Python program, and see what is happening here.

No comments:

Post a Comment