Guests departing, finally back to coding and later set up to test. Have to haul logic analyzers, scopes, drives, and other items back from storage and hook them all up.
I coded the read sector process for the emulator which will continually spit out the clock and data bits as the virtual cartridge rotates under the virtual head. As soon as the FileReady is on and we are not in the midst of a seek, the process will wait for the beginning of the next SectorMark and then generate continuously.
Testing is much easier this way, since the disk tool itself will start the drive, turn on FileReady and emit the clock and data bits. All I need to do for testing is override the ReadGate input with a slide switch so that it allows the ReadClock and ReadData pulses to emerge on the outputs.
The logic for the read sector process and the other new parts are all synthesizing without complaint, thus it is time for me to set up for testing. For that, I need to get all the gear out of storage and onto the workbench. I have a party to attend tonight so testing won't commence until Sunday.
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