Tuesday, December 18, 2018

Working on restoration of erasable memory module for Apollo Guidance Computer

ATTEMPTING RESTORATION OF ERASABLE (CORE MEMORY) MODULE

Diagnostic X-rays

We had hoped to use a micron resolution CAT scanner but the module was too large to fit in this specialized scanner used for connector testing. Regular X-rays were taken but are inconclusive. We don't see a break in the wire in the images, but it could be small enough to miss.

We will need to think about additional testing we might be able to do, such as TDR (time domain reflectometry) where we send pulses through the suspect pin and look for the reflection from the broken end. This could give us the time, therefore the distance, from the pin to the break.

Investigating alternatives to the module

It is time to ramp up plans for alternative means of operating the AGC if we can't get this module working. There are quite a few alternatives, each with advantages and disadvantages. These range from simple methods that allow us to use the broken module in place to various replacements.

Since only one bit is disabled by the broken inhibit wire, we could regenerate the content of the bit from the other bits plus parity. A real parity error would be missed, plus we would need to develop some additional hardware to do the generation and injection of the bit value.

Another method would have us swap the parity and bad bits, with parity checking disabled. This would also miss parity errors, and involves some more alteration to the wirewrap than the first method. On the other hand, it wouldn't take any additional circuitry.

We could build a replacement core memory module to insert in place of module B12. We have no hope of bending 4K bytes in the same small space, but could use other technologies. For example, F-RAM will provide nonvolatile storage or some other kind of storage technology.

It would be more complex because we have to provide the right loads and impedances to the driver circuits as the original core stack. These are known to be relatively fragile thus more risky. It would require the most complex design work as well.

We do have the two methods developed by Mike. We can wire up a circuit to the sense amplifier inputs and respond to memory requests, leaving all the driver and sense circuitry out of tray B. We either need to mount this circuit inside the tray somewhere or are restricted to operation with the cover removed.

The other method uses the maintenance connector A52 but there remain some conceptual problems in using that for erasable memory substitution. Not all signals needed for a perfect substitution are available on A52. Mike is hopeful he can work out a scheme that will work, but it is not yet proven. This does allow the covers to be on the AGC.

If we somehow had access to another erasable memory module, one that was not defective, that could be used as well. This would be the easiest method of 'repair' but is fairly unlikely.

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