NEW PCB READY FOR TESTING
I had spent many hours checking continuity for all signals on the board and eliminating the chance of any shorts to adjacent pins. On the testbench I verified that all the outputs are producing correct pulses and the parity generation produces the proper pulses. The new PCB was installed on the 1130 system where I will do the final testing.
MANUAL LOAD AND DISPLAY TESTS
Using the rotary mode switch, I could set it to LOAD and push the Prog Start button to load the pattern in the console entry switches (CES) into the memory location set by the Instruction Address Register (IAR). Turning the mode switch to DISPLAY and pushing the Prog Start button will read memory and display its output on the Storage Buffer Register (SBR) lights.
To set the IAR to a particular address, I set the address in the IAR, set the mode switch to LOAD and push the Load IAR button on the console. This way I could put multiple patterns into memory.
Using this, I verified that I could set patterns which would be read back correctly. Changing the CES and storing different patterns first, I went back and displayed the locations to verify that what I stored was what was returned, including correct parity.
I did not yet set up the oscilloscope to verify that I wasn't experiencing any spurious retriggering of the read or write timer outputs. That was the main issue I was experiencing with the prior PCB. Off visiting family for a few days and handling other obligations but will get to this soon.
FILLING STORAGE WITH A CHOSEN PATTERN
Turning the rotary mode switch to RUN restored normal function. I then opened the top cover to access the six customer engineer toggle switches. Turning on the Storage Load toggle switch set up the machine to loop through memory repeatedly storing the value set in the CES into all memory words. I pushed the Start button to begin the filling process and used the rotary mode switch to halt the operation by momentarily switching it away from RUN.
I then turned the rotary mode switch back to DISPLAY and checked some locations. The location is set in the CES, Load IAR is pushed, then Start is pushed to read back the stored value.
Some patterns led to a parity check stop. If I am still seeing spurious read pulses updating the 1130 Storage Buffer Register at the wrong time, that might be causing this issue. Alternately I might have some issue on the board that I didn't catch on the test bench. Using the scope will help me understand what is happening.
Worse as far as I am concerned, it appears that during these stops location 0 is overwritten with the contents that were being fetched from the address with the error. I will need to understand this failure mode and block it - that might require an update to the design.
