Monday, July 13, 2015

Will never be able to run DOS/VS on P390, put crowbar circuits back into Pertec and worked on ztex board issue






A fellow enthusiast has gently steered me to the realization that the basic design of DOS/VS is oriented to 2K pages, but the P390 only supports 4K page tables and protect keys. Thus, there is no way that DOS/VS is going to run on the bare metal P390. Further, since CP/370 will use the same page table scheme as the guest, putting DOS/VS in a virtual machine will not resolve the 2K page table problem.

In fact, I was seeing CP itself crash, which I believe is due to the 2K page tables it attempts for the DOS VM. Thank you, Glen, for helping me see this. While later on, as VSE, the operating system evolved to use 4K pages (and ESA mode), that software is a licensed product that I have no entitlement to use nor access to download.

To complete my itch to do a ground up sysgen, I will need to take the DOS/VS work over to Hercules on a PC, abandoning the P390. At least I can wrap up the sysgen fairly quickly and satisfy the nostalgia, leaving the P390 for playing with VM and MVS kinds of code.


I installed two of the three crowbar SCRs today. Part of the challenge is that the board has traces on both sides, but the process of desoldering removed the scanty copper lining the holes - thus I need to have the lead soldered on both the top and bottom in some cases. This is easy with long leaded components like resistors, but not so good for a transistor that bolts down to the board. Two of its leads are hidden under the transistor.

My solution was to use solder paste - a paste that has small beads of solder, intended to be melted in a  reflow oven. I put that on the top trace and into the hole, then pushed the transistor leads through. After bolting it down, I had solder paste in contact with the bottom and top traces plus the lead, so a bit of traditional solder applied to the bottom causes both sides to flow.

I verified that the hidden top traces were in contact, and that no unintentional solder bridges were formed, by using a VOM as a final quality check. The third SCR was bad and the replacement part I originally ordered on eBay was also defective when I tested it. I have a NOS unit coming from a more reliable supplier and I will place that on the board once it arrives.


Both Richard and I were digging through the schematics and other documentation to find any way that I might have affected one of the signal lines that is needed to have the fpga configure itself from flash on startup. Neither of us can see those lines routed to the IO connectors where I attached.

I wanted to check before I took the board from Richard which is working well now and hook it up to the SAC box, just in case something in my wiring is damaging the ztex board.

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