I cleaned up some of the CRC generation design but was still testing as of the end of lunch today. I first have to reconcile what I am seeing - to generate the same CRC value as I am retrieving from the disk - before I am sure that the generation logic is sound.
After quite a bit of struggling, I realized that somehow they injected the sync byte into the CRC generator. If I start with just the header fields (two bytes of cylinder number and one of combined head/sector) the CRC comes out wrong, but if I start with the 0xFF sync byte before the three header bytes, I come up with the same CRC value as was stored on the disk.
The therefore don't really check for a sync byte, the controller treats the first non-zero bit as the start of the sync byte and just stuffs that all into the CRC generator. If it was a spurious one bit inside the preamble, the CRC won't match thus this is not risky, but it makes my synchronizing logic wrong or I would need to go inject a pseudo sync byte into the generator myself.
However, I did come up with a solution that is simple - I can change my CRC generator module so that a master reset sets up the register values equivalent to having processed the sync byte, rather than to all zeroes. That way, my existing logic can feed the three header bytes through and get to the same CRC value. This is what I did. Interestingly, that is a value of 0x4040.
|Test setup for disk controller (center) and drive (on left)|