Tuesday, September 27, 2016

Replaced logic to read/write RAM over USB link


XEROX ALTO - DIABLO DISK TOOL CREATION

Today I rolled out all the logic that should manage the RAM input/output from a USB connected computer to the onboard RAM which is the disk cartridge buffer on my fpga board. I had to accommodate the 'autoRAM' behavior of the digilent reference code, since the Adept utility depends on this.
Logic from Digilent I replaced with my own code
That behavior was a bit complex, given an 8 bit wide extended parallel port (EPP) is the USB transport but the RAM is configured to be 16 bits wide to match the Alto. The digilent behavior operates in either byte or word mode.

Word mode is where pairs of reads or writes are used to deal with a single RAM word.That meant an internal register to hold one half of a word and a state machine that alternates between actual RAM access and dummy cycles manipulating the internal register.

Byte mode writes a single byte and expects the fpga to determine based on the low order address bit whether this goes in the upper or lower byte of a given RAM word. I don't have insight into the Adept utility and can't guarantee that it only uses one of these modes, so I had to implement both.

A further twist is that the RAM itself is 16 bits wide, but has two control signals, UB and LB, which determine whether the write updates the top byte, the bottom byte or both. Similarly for reads, it only makes the output bus active for the selected byte unless both are requested.
Digilent provided state diagram for memory controller module

My lowest level RAM access FSM always deals with 16 bit words, reading and writing both upper and lower halves. I didn't want to modify this to support the digilent byte mode, where a user may write only one of the halves of a given word address.

The performance critical behavior is dealing with the disk drive and the host computer, which always occurs as full words. I left my inner FSM as it is, so I had to deal with the half byte problem up in the new logic. Essentially, I handle a byte write by first reading the entire existing word, replacing only the half being 'written' and then writing back the entire word.

I am actively debugging all this tonight.



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