XEROX ALTO - DIABLO DISK TOOL CREATION
I am working on a better representation of the state machines I will code. The usual diagrams for Moore and Mealy machines don't fully express what I do in my compact FSM style.
The issue is that the normal diagrams show outputs as either a fixed value for a given state, or a value that blends the given state with some input signals. However, I have some values which are emitted only during the transition from one state to the next, in other words they persist only for the first cycle of that new state but if it remains in that state for subsequent cycles, other values are emitted instead.
The values in question are not a steady output of the old state nor a steady output of the new state. While they are a combination of input signals and the old state, they aren't emitted until the clock edge when the FSM enters the new state. These don't fit the usual Moore and Mealy notions and the existing diagramming methods
I decided to show the one-time values being emitted on the arc that shows the transition. Normally these arcs just show the conditions that cause the transition, but I will add some emission notation from the arc, similar to the emission notation that is used from the state nodes.
This new notation helped me firm up my logic for the write field FSM, which as I said yesterday is a bit complex since it coordinates with several other FSMs. I did waste some time with bogus error messages from the Xilinx tool, wherein the error is claimed against some signal quite different from the real source of the error.
I had my new FSM controlling the 'load word' signal, but hadn't removed the connection of that signal from the input button 1 since I was 'toggling' the button in the simulator. The error should have said multiple drivers for signal load word. However, it instead complained about multiple drivers for the tristate mem_OE signal, wasting my time hunting for the real problem.
I ran the simulation on my write field logic, which helped me spot some weaknesses in the serializer and how it interacts with this new FSM. With that cleaned up, I appeared to write the preamble of 34 words of zero correctly and then move on to read memory and write those words. This trace will take quite a bit of time to check over, as I have to count all the transitions to be sure that I am not dropping or adding any bit cell times during the transitions through this state machine.
I looked through this more carefully and it still looks solid, so I moved on to build the higher level write sector FSM which will call the write field machine three times. That too looks good, but I didn't have time to check as carefully because my flight home was landing.