Bit 0 flip with parity stop has gone away

MY ANALYSIS OF THE BIT FLIP ISSUE

Since I had used the Storage Load and Storage Display CE functions, which loop continually through memory either storing a pattern on the console entry switches or reading out storage, I was pretty certain that the sporadic flip of a bit from 0 to 1 was NOT occurring in the memory unit itself. If it had, the Storage Display would have stopped on a parity error. 

It was occurring during program execution, specifically with a tight loop of an Add instruction and a branch back (MDX -1). My working assumption is that some other part of the machine which writes to memory is flipping bit 0 improperly. 

The inputs to the storage buffer register (B Reg or SBR) are all tied together in a large wired-OR with every contributor able to assert a 1 bit by pulling the shared line down. They should all be properly gated so that they do NOT pull to 0 unless they are supposed to be controlling memory.

It was my working hypothesis that one of those sources was not gated properly and sometimes emitted a 1 into the SBR at bit 0. I was seeing my loop programs trip an error within a second or two of starting to execute, which is frequent enough to trap with a scope or logic analyzer but not fixed enough to find statically. 

THE ISSUE IS NO LONGER OCCURRING

However, when I ran the loop this time, it ran continually without any injection of a 1 and therefore without the parity stop. There may be other conditions necessary to trigger the problem but as of right now it seems solid enough that I can proceed with debugging by running code.