Debugging and repairing the Quartus software on Ubuntu Linux

ENVIRONMENTAL VARIABLES NOT FULLY SET

The installer updated one environmental variable but left another unset and did not include the Quartus executables in the PATH variable. I worked through that and was able to have all the components of Quartus execute properly. 

ERROR MESSAGES FINDING TEMPORARY FILES DURING QSYS

When you complete using Platform Designer (formerly called Qsys), the resulting design that ties the Field Programmable Gate Array (FPGA) side with the Hard Processor System (HPS) side has to be generated. In that process, TCL scripts are run and these failed for several intellectual property elements (i.e. not code I wrote or control). 

After a bit of digging and debugging I found that it was failing to open some temporary file, which I presume should have been written earlier in the generation process. I got lucky and found a match with a Google search which referenced another post that clarified the problem. Quartus depends on a number of Linux facilities being installed, but does NOT check during installation nor throw an intelligible error. 

NOW ABLE TO GENERATE THE SOC CORE FILES

I updated my Ubuntu system with the (secret) requisite functions and the generation completed fully successfully. That is the process which also generates the TCL scripts that have famously failed for me on all the other releases and OS platforms. Fingers crossed, it would now compile and run those scripts. 

COMPILATION OF MY LOGIC STILL FAILING ON SCRIPT ERRORS

Regardless of the OS or the Quartus version, I get the same error attempting to execute the provided TCL script. Right at the start of the script it attempts to run the SDC_EXT package which is rejected because that can only be loaded from STA or FIT packages. As far as I understand the intent of Quartus, it should be running STA for the command line and any scripts. Trying to manually load STA results in an error that no such package exists.

I see a few possible causes for this inept behavior of the installed Quartus product (not back at Intel but when running on my various systems):

1. Some path or environmental variable is missing which lets the software find the STA package
2. Permissions are incorrect for the package or its path
3. The installer failed to install those packages
4. Configuration of Quartus is incorrect such that it doesn't execute STA for the console
5. Another secret prerequisite is some specific older version of TCL instead of the version installed on my various Windows and Linux systems

WHY THE SCRIPTS MATTER

The Quartus system builds these helpful but somewhat opaque scripts to set up all the parameters and pin assignments that are needed to build the FPGA logic. The DDR3 RAM, for example, has a myriad of pin assignments, voltages, modes and other settings that are essential in order to have the ram access work properly. 

Until these scripts are run and thereby configure these settings for the FPGA, the router/fitter logic can't implement the logic that was synthesized from your HDL plus all the IP HDL from Altera/Intel that glues everything together. This is where I was failing, with issues placing components and discrepancies in voltage levels. I set up the HPS side DRAM for 1.25V logic but the error messages showed pins set to 2.5V, clearly residual values which would have been overridden had the script executed properly. 

SEEKING OUT THE STA PACKAGE TO ELIMINATE (3) AND INFORMS FUTURE DIAGNOSIS

I do indeed see the STA executable as well as the general TCL library of packages such as SDC_EXT, so they were installed. One avenue would be to dig into whether there is a missing environmental variable or something wrong in the path permissions. 

NEXT STEPS DIGGING INTO THE FAILURE

I discovered that I could execute some scripts by using the command line and issuing quartus_sta with a parameter of the TCL script. I was able to run the offending script that had failed before, but it still had not set all the pin assignments and slew rates required for the fitter to assign logic to locations in the FPGA. 

I tried to run the script hps_sdram_p0_pin_assignments.tcl from command line with quartus_sta but it kept complaining about invalid project name, a required parameter on the command line for the script. I feel that I am getting closer and closer to the point where I can produce a binary file to load the FPGA with my logic. 

SCRIPT EXECUTION ATTEMPT NUMBER 999 - RESULTS xxxxxxxxxx

xxxxxxxxxx