SAC INTERFACE FOR ADDING PERIPHERALS TO THE 1130
I made quite a bit of progress on the SAC interface logic, coding up VHDL to support up to 20 peripherals, whether fully physical or partially implemented in a PC. The link basics are built, allowing the PC to service devices. In addition, I created a special pseudo device which can load or dump memory contents from the 1130 as well as providing diagnostic support by watching memory locations and some status conditions.
I worked out the basic skeleton of the access to the link from the PC, using the Digilent Adept SDK to find and use the USB based connections to my fpga board. The library is built as C DLLs but I wanted to write my PC code in Python, which involves a bit of adaption with the ctypes module and others inside python that allow me to call C libraries and manage their expected data types.
Without the hardware, my testing was limited, but I was able to build up my skill with ctypes and Adept so that I should be able to move reasonably quickly after I get home.
Without the hardware, my testing was limited, but I was able to build up my skill with ctypes and Adept so that I should be able to move reasonably quickly after I get home.
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