Saturday, January 23, 2016

Logic to return values from FPGA not working perfectly

Today I have a wake for a good friend which will run until late tonight. I did get a bit done but not much free time. Tomorrow I have a board meeting for the Digital Game Museum, but that will only be a half day.


I resumed testing of my new 12 word transaction packet with the SAC Interface board. I found that my machine state poll got back data that didn't match my expectations - I seemed to inject an extra word and get the data packets out of sync. I am looking over FPGA logic and inserting some diagnostic printing to help me chase this down.

I made some changes to the fpga but got the same results. The inbound transaction is 0xA54C which is command 12 (poll state of machine), device 20, and the standard pattern 101010 with the next 11 words set to 0x0000. What I should see is the command word 1 echoed as the first returned word, then status words with a prefix of 1, 2, 3, 4, 5, 7, 8, 9, 10, 11 and 12. Instead I see the command word in the first two return words, then the status words offset by one word.

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