Failure to try to load heads as drive comes to speed narrowed to defect in one card

FIRST TRY TO HAVE HEAD LOAD SOLENOID ACTIVATE WAS UNSUCCESSFUL

The 90 second time delay relay, which I am waiting to replace, opens a circuit that is at ground initially but when disconnected is seen as logic high. When that signal goes high, it powers the head load solenoid to force the heads onto the disk surface. I used a wire with alligator clips to substitute for the relay contacts, intending to unhook the wire to trigger the head loading.

However, when I did this, nothing happened. It didn't take a lot of probing around to fine that the '70 percent latch' was active. This is a circuit that detects when the disk rotation speed slows below 1050 RPM, forcing the heads to unload and requiring a power cycle of the drive to reset. Now, I could see from the sector and index pulses that the disk was right on speed, so this was a spurious error detection. 

SPEED DETECTOR CIRCUITS IN THE DRIVE

The machine has circuits that validate when the drive is up to speed before the heads can be loaded, and they also detect when the speed slows below 70% of nominal. These two interact with each other and drive the 70 percent latch I mentioned earlier. 

The bottom of the disk platter inside the cartridge has eight slots evenly spaced around the periphery which generate the sector pulses, plus there is a second slot just after one of the eight which is used to generate one sector pulse per rotation. 

The sector pulses are used to drive the speed detectors. One of the detectors produces pulses that will set the 70 percent latch on, the other produces a reset signal that keeps the 70 percent latch from turning on. Thus the timing of the reset signal turning off is important relative to the setting pulses. 

The yellow line is the output of the integrator that turns off the reset control on the 70 percent latch. Its voltage rises with sector pulses until the threshold is reached that turns off the reset line, thus allowing the latch to get set by the other circuit. The green line is the inverted reset control, so when it goes high the latch can be triggered. 

The purple line is from the rate detector that creates a pulse for each sector and eventually will stabilize as a single level, unfortunately long after the reset signal (green) has turned off. I didn't capture a picture of the purple signal after it reaches that level, but there is an image in the IBM manuals that I included just below.

The purple signals create pulses, on the blue line, that set the 70 percent latch. These pulses stop once the purple signal stabilizes. The key to the proper behavior of the two detectors plus the latch is that the integrator (yellow line) should not start counting until the purple line has stabilized. There is a circuit called a squelch that should block the integrator but it does not appear to be working, thus the early integration and release of the reset signal. 

The trace above shows the squelch signal in purple, the integrator in yellow, the reset signal in green and the setting of the 70 percent latch in blue. The latch signals keep setting the 70 percent latch but the reset signal will immediately turn it off again (until the integrator reaches the threshold). 

When the pulses (blue line) setting the latch become so close together they produce a steady on level in the blue signal, which is what releases the integrator to begin its work. The squelch output (purple line) should stay low until the blue line is essentially steadily high. What we see is that the integrator begins counting, only being squelched for the first 80 milliseconds of the trace then climbing steadily. 

annotated with the scope trace line colors

from ALD

All of the circuits above are on the undocumented (to me) 7235 card you see below, packed with components. I will have to reverse engineer the squelch and integrator portion so that I can determine why the squelching is not doing its job long enough. 

The ramp generator behavior based on the IBM supplied trace images implies that it charges a capacitor up to +5V and discharges it with the incoming sector pulse. The different rates of charge and discharge mean that the recovery back to +5V is slower. If the next pulse arrives before the recovery is complete, then the high voltage drops. The trace implies that it stabilizes around 3V. 

The detector that comes next is apparently a threshold detector, activating for the time when the voltage is no more than about 3V, producing the set pulses for the 70 percent latch. Once the ramp gets down steadily below 5V, the set pulse is steadily on. That leads to turning off the squelch and allowing the integrator to build up. 

In the second scope trace in this post, you can see that the ramp detector pulses have not become a solid on signal yet, they are still spaced apart (blue line) but the squelch circuit output was drifting up (purple line) which no longer resets the integrator. 

My assumption is that the squelch input into the integrator, which should initially be high and only drop to low when the blue line is steady, is the malfunction here. The high input level causes the integrator to discharge the capacitor that is building up voltage from each sector pulse, so that it never accumulates a high enough level. 

Once squelch drops to low, the capacitor is free to increase its charge with each injection of energy from a sector pulse until it asymptotes to roughly 5.5V. The threshold detector is set to some voltage that corresponds to approximately 1500 RPM rotation. This turns off the reset line for the 70 percent latch so that if it is ever presented with another set pulse from the ramp detector, it will latch on and stay that way until the drive is powered down. 

If the pulse arrival rate slows enough, the voltage on the ramp generator begins to climb back above 3V towards 5V. The detector then produces the set pulses, which turn on the latch. The reset signal won't turn back on until the drive has slowed to about 30 RPM when the integrator result gets low enough. The drive is already coasting to a stop at this point. 

Importantly, until the drive motor is turned off, the latch stays active blocking disk activity. The drive is reported as not ready and the heads are unloaded while the latch is set. Thus, if for some reason the disk speed gets dangerously slow (< 70%) during operation, while it keeps spinning the drive inactivates itself and the operator must turn it off completely before restarting. 

The fine ballet of charging, discharging, thresholds and pulse production depends on the values of capacitors and resistors on the 7235 card. This is in addition to the usual possibility of failed transistors or diodes on the card.