Testing the 1130 MRAM core memory replacement on the IBM 1130 system - part 3

RESOLVED THE PIN ASSIGNMENT MISTAKE ON MY PCB

I installed jumper wires on the six pairs of pins I had previously identified. In addition, I discovered three more pairs that have the same characteristics - -Sense Bit 17, +SAR Bit 3 and +SAR Bit 10. Those were also jumpered on the backside of my board. 

TESTING WITH LOAD AND DISLAY MODE

I still saw parity errors when doing a DISPLAY on any address, but when watching the signals I could tell that I was in fact writing the 1 or 0 value into memory and then generating a pulse on the sense output line when the bit stored was a 1. 

However, B register bit was NOT being set when that pulse occurred, s it should. There is a flipflop in the B register circuitry that will be set if there is a falling edge on its input - that comes from my circuitry. 

THE ISSUE IS THE PULLDOWN CURRENT FROM MY BOARD (OR DURATION)

The sense output bit is generated by a 74HC03 gate, a NAND with open collector output where the gate pulls the output to ground when activated. The pulse may  not be long enough, at about 100 nanosecond duration, since the IBM core memory circuitry produces that pulse with a duration more like 180 ns. It is the falling edge that causes the action, not the duration, so that shouldn't matter. If it does, I could adjust it by swapping the capacitor that determines the length of the pulse I produce. 

However, what is more objectionable is the low point of the pulse I am producing. It is not down to zero volts, instead reaching no lower than about .6 volts which is way above the SLT logic zero definition. Since my gate is conducting to ground, I expected it to get much closer to 0V. 

Looking at the spec sheet for the 74HC03, it does show that with a 4.5V VCC (we are at 3.3V) and a 4ma current sunk by the gate at logic low, the voltage is typically .33V, which is already too high for SLT. As with all issue with digital logic, one has to look below the abstraction at the real analog behavior to understand why it is not switching. 

There has to be enough current to reverse the conduction of a pair of transistors at the heart of the flip-flop. This will depend on the resistors and other contributors to resistance as well as the current sink capability of the driving transistor in my gate. The flipflop is shown as consisting of several circuit elements in this IBM diagram below:

In the IBM documentation, circuit segments are named with codes such as T20SC, the first letter indicating the speed of the circuit which is 30ns in this case. The two digits define a logic function, then the suffix letters indicate the variant with differences such as resistor values used. I don't have a full set of schematics for these circuit segments but can find some (or close family members) in schematics I do have for certain SLT cards. 

This section of a 5804628 card schematic has a section where the only variance is in the two AND blocks which are S03AJ instead of S03SQ. 

The schematic for the T20xx circuits is:

The S03xx circuit attaches to one of the outer transistor collectors above such as pad 4 or 11.  On this card it uses an S03AJ circuit but we are more interested in the S03SQ which better matches our B register card. 

I then looked through other cards with flip-flops until I found the S03SQ circuit schematic on a 5803794 card:

Connector 2 above is what connects to the T20AB circuit connections to set or reset the flipflop. Connector 3 above is what connects to the output of the flipflop which blocks a set or reset from passing through if the flipflop is already in that state. Connector 6 above is the gate signal that sensitizes this circuit - when it is at logic low, a falling edge on connector 1 above will send a pulse to the flipflop. 

My board has to send a falling edge that will pull the charge from 33 pF capacitor, thus pulling down the base of a transistor in the flipflop, through a diode, causing it to conduct and flip the state. To clarify the discussion a bit, we are looking at the signals to set the flipflop when my sense bit pulse has a falling edge. 

SIMULATION TO UNDERSTAND CORRECT AND FAILING OPERATION

I set up LTSpice to simulate the circuit. I don't have exact parameters for the Germanium transistors and diodes in the IBM SLT modules, but I used a model I found for an old Germanium transistor and hoped the results would be reasonable. I set it up to be initially in the reset state and applied a 100ns pulse to the circuit on the set side at +1 second. The flipflop switched as I expected it to, seen in the graph below:

Green is Q, blue is notQ outputs of the FF

The circuit I entered is here:

I used an initial condition to set the flipflop to its correct starting state. I applied a pulse using a voltage source at the bottom and simulated to get the graph above. I can now experiment with various defects such as too high a bottom voltage for the pulse to see if I can reproduce the failure to set the flipflop. If I can, I have a way to test various solutions for correct operation. 

Without the correct diode and transistor models, I won't get the same results as I am observing but it let me explore variations in the pulse voltage dip and the pulse duration. I didn't find much sensitivity to a shorter pulse; it worked down to a 3ns duration and failed at 1ns. 

It was more sensitive to the bottom voltage of the pulse. I could get it to fail at 1.9V and work at 1.8V or lower. These aren't accurate since the semiconductors aren't accurately simulated. 

Another idea I explored is that cumulative capacitance is slowing the fall of the signal so that the duration is what limits the bottom level reached. This can be capacitance on my PCB, in the cable and in the 74HC03 chip, in addition to the backplane and receiving circuitry of the 5804619 card. I bumped the capacitor up and watched the signal closely to see whether I could reproduce the shape. Higher capacitance actually made it less sensitive. 

I then dug through my documentation for IBM SLT and found some parameters that let me refine the models for the diodes and transistors in the circuit. The new circuit with the models is:

This is modeling the shape of the pulse I am generating with my board. I found that it would fail to switch at 0.9V but switch at 0.8V or lower, much closer to the failure point I was seeing on my scope. 

dark blue is the input pulse

Even with the pulse duration extended by another 50 nanoseconds, the flip flop will not turn on when the pulse only dips to 0.85V. It is much more sensitive to the low voltage than it is to the duration of the pulse since it is edge triggered. 

I then dug into the spec sheet for the 74HC03 chip that generates the pulse and see that it is current limited compared to the demands of the flip flop edge detector. By varying the series resistance of a voltage source, I recreated the observed pulse shape with about 1K of resistance, but the flip flop needs about four times that current to flip. Interpolating the spec sheet to the 3.3V VCC I am using gets me to about 3ma of sink current, which is close to the effect of the 1K series resistance in the model. 

HAVE TO FIND NEW CHIP TO DRIVE THE SENSE OUTPUT PULSES

The simulation suggests that I need about 10-12ma of sink current to reliably flip the register on. Initially I found that a 74LVC1G138 chip provides a single 2 input NAND gate with open collector and can sink 16ma on a low output with a max of 0.4V which would be excellent if I had designed with that originally. It would require a new PCB to implement, adding more than a week of delay.

The best fit would be a chip that fits the same footprint and pinout, but sinks 12ma and operates with 3.3V VCC. The 74LCX38 chip is exactly what I want. It has the same pinout as the 74HC03, operates at 3.3V VCC, and can sink up to 24ma with a low output. It comes in an SOIC-14 narrow package that is compatible enough to solder onto my board as it is.

Now the challenge - buying the SOIC-14 version is going to be difficult. Through Digikey, I can only buy batches of chips from a marketplace dealer - Rochester.  Mouser does not carry the SOIC-14 version at all. Rochester will not sell less than $250 at a time - even though the chips are less than a dollar each. The manufacturer, OnSemi, points only at Rochester as a distributor stocking any of them. 

Of course, Amazon and eBay offer a number of vendors in China who promise they will send me the chips. In my experience, almost every vendor from China is selling fake chips - sometimes they are just marked with the part number but don't work. In other cases, they take a similar chip like the 74HC03, bleach off the identifier and remark it as the chip I want. The chip inside still won't deliver more than 3ma, so that would be a waste of money. 

Based on this, I might be forced into the PCB redesign where I have several options for chips I can buy. I guess if I can verify the design works through some Rube Goldberg adaption right now, I could finish testing on the 1130 and then order the new PCB and new chips.