I kept at it this morning, trying to achieve a good link between my fpga board and the PC program. After burning some more hours, I decided that I am facing too many unknowns here - is the hardware working, the libusb, the firmware correctly in the FX2LP module, the bitstream coirrectly in the fpga, my logic for writing out of the fpga working, the python pyusb binding working, and so forth.
I decided to build one of the example programs and run it, which would eliminate about half of the possible issues and help me zero in on any defects stopping me from sending data from fpga to PC. It ran perfectly from the Surface Pro - so that I know the libusb on the tablet works, the Java binding works and the hardware is good.
The python program is on a laptop with a different libusb, the pyusb binding and my own code on both sides. Still a lot to eliminate, so I thought I would hack the code in the example so that it talks to my fpga - if I can get data flowing from the fpga to the Java code on the tablet, it further divides the potential problem area.
Immediately I discovered the problem in my code to contact the fpga board, made a small change and immediately I was receiving properly formatted messages. I turned on a bit of the code on my PC side program and began testing. The data is flowing in properly, but I have a minor flaw in the display update of the GUI. Once I fix that, I then powered on the 1131 and test out the quality of the data capture by the interface cards and fpga.
It doesn't appear that I am getting the right data flowing up the link, but diagnosing and fixing this will be simple now that I have the basic transport working properly. I took the time to do some other cleanup of the logic before resuming testing.
The python program is on a laptop with a different libusb, the pyusb binding and my own code on both sides. Still a lot to eliminate, so I thought I would hack the code in the example so that it talks to my fpga - if I can get data flowing from the fpga to the Java code on the tablet, it further divides the potential problem area.
Immediately I discovered the problem in my code to contact the fpga board, made a small change and immediately I was receiving properly formatted messages. I turned on a bit of the code on my PC side program and began testing. The data is flowing in properly, but I have a minor flaw in the display update of the GUI. Once I fix that, I then powered on the 1131 and test out the quality of the data capture by the interface cards and fpga.
It doesn't appear that I am getting the right data flowing up the link, but diagnosing and fixing this will be simple now that I have the basic transport working properly. I took the time to do some other cleanup of the logic before resuming testing.
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