Friday, August 28, 2015

Designing enhancement for SAC Interface Box and working on misadjustment of console printer shift mechanism


My suspicions are focused on the known problem where the typewriter won't perform shift cycles - it should switch hemispheres on the typeball and those cycles will fire off a cycle and response, although won't pass along an interrupt to the processor. If the cycle is not occurring, it might cause something to time out in the adapter and thus present an interrupt when none should happen.

My first investigation will be into the shift mechanism, getting it working properly before I go on to debug some of the other symptoms. Now that the lack of interrupts is resolved, I have to check and fix:
  • no shift
  • CR by program command doesn't work
  • red/black ribbon shift not adjusted right
  • Tab by program command doesn't work
  • Backspace by program command doesn't work
In addition I have to test the index (line feed) function to see if that works under program command. Due to the 90+ degree temperatures today, I chose to keep the machine powered down until it had cooled by early evening. Instead, I removed the cover from the console printer in order to begin working on the failure to shift, the red/black ribbon adjustment and other possible adjustment issues. 

Working on the machine with the covers off, I can tell that the shift mechanism is not working properly. I am digging into it as much as I can stand, due to the heat, while my portable air conditioner tries to make the workshop habitable. It took several hours and didn't get the temps down low enough to power up the 1130 until the late evening, past when I was interested in working. Des


I have specific locations on the backplane where I will tie in my four signals to allow the box to manage interrupt levels 0 and 1. These are one the two swing out gates under the console printer and display panel, that swing open to the rear. The gate at the rear is A and behind it will swing out gate B. One each gate, there are three card compartments, each with a backplane. These are A1, B1 and C1 from left to right when looking at the SLT cards, or reversed when looking at the backplane side.

On the inner gate B, on the backplane for compartment A1 and in row 7, we have card G7 pin B02 which emits +Int Lvl 0 and pin D20 which emits +Int Lvl 1. These two signals can be redriven out to my box in order to see the state of these two interrupt levels.

Also in that compartment is card J7, whose pin B13 is an input -Int Lvl 0 Req which I can wire-or to a gate that will pull it down to ground request a level 0 interrupt. The final signal is on the other gate, A, in card compartment C1, where the card at H7 has an input pin D05 for -Int Lvl 1 Req which can be similarly wire-or pulled to ground to request an interrupt on level 1.

I need two open collector gates to pull the interrupt requests down to ground, and two buffer gates to redrive the interrupt status signals, using four twisted pairs in a cable to run out from the 1130 to the box. At the same time, I will run the line for my "program load" function on a fifth twisted pair.

A small board I will build will be triggered by the program load signal I will send, which fires three relays with suitable timing so that it activates the Immediate Stop switch, then the Reset switch, and finally pushes the Program Start button, with the timing permitting my box to use cycle stealing to load in eight words of boot program right in between Reset and Prog Start. I have ordered the relays for the task but still have to design and build the sequencer logic.

I whipped up a conceptual design with a 555 timer popping each 1/2 second when not held in reset, driving a binary counter chip which I would feed trough a decoder to get 10 single distinct output lines as it counted. The first two would fire the Imm Stop and the Reset relays, then it would count up to 9 and fire the Prog Start relay. When 10 fired, it would reset a S/R flipflop which held the counter and timer chips in reset until the next trigger pulse set the flipflop to do it all again.

The SAC interface from the 1130 included the Reset state signal, so that I could synchronize this all from my box. I would fire the trigger to set the S/R flipflop, wait until I saw reset activate and then deactivate, use cycle steal to write locations 0000 to 004F with the 80 column boot card image and then later the counter would get up to 9 and trigger the Prog Start button to make it execute.

I ordered the discrete chips and other parts I needed so that I could wire this together and begin testing. At the same time, I ordered some parts to implement a small card that fit inside the 1130 to receive and drive my four additional interrupt level signals out from the 1131 to the SAC Interface Box. I should be able to build these circuits by mid to late this coming week, once the parts arrive, and then I can cable this into the new improved SAC Interface Box. 

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