Friday, August 7, 2015

Making progress on ztex fpga board issues; researching mystery logic in a 1401 at CHM


Got out at lunchtime to bring up the 1130 and resume my testing. First, I tried updating the board to a new bitstream and have it load that stream at power-on. It worked find. I then tried to link my Python code on the PC to the fpga, but the usb library is not finding the board.

It could be yet another windows induced problem, or it could be with the device itself. It is possible this is just a problem with the firmware loaded on eeprom on the board, which can initially present as one type of device if uninitialized. It also can be some error in Windows recognizing and connecting to the USB controller.

It turned out my problem was that the windows usblib had evaporated and had to be reinstalled. After I did that, my python code failed with an error that endpoint 0x6 is invalid. The ztex board has its default usb firmware installed, but my code had been working properly with the memfifo version. When I put memfifo.ihx into the usb controller, the good board stopped booting ffpga rom the flash. I put the default.ihx back and it again allows me to boot bitstreams I put in flash.

Aha, I thought, maybe this will make my board do the same thing. I went back to try my board but the default.ihx firmware does not help it. Still, something isn't working properly with the memfifo.ihx firmware but the default is good. I will need to set up the full compilation toolchain and build my own usb firmware in order to get this to work properly.


I dropped by the CHM for an hour in order to look at how extensive an issue we might have with undocumented logic. In gate 01B7, I found 11 cards that are added in slots marked as "reserved for RPQs" and not documented on our ALDs. These implement up to 29 gates of logic which are seemingly related to the card reading/punching and checking logic in 01B4 and 01B7.

Tracing the connections is very tedious - a rats nest of wirewrap lines between pins on the backplane of the gate, running among the 2080 pins. Each one I attempted also ran off-gate and over to 01B4 gate, which slowed me even further. I just found a handful of connections in my hour, but I did get a list of the added cards which will help us search for input/output connections and ultimately draw up a schematic, ALD-like. 


  1. Is there a list of common RPQs for the 1401 somewhere? That might help narrow things down.

  2. Hi Pete. I would need both a list of RPQs and schematics (ALD pages) for them. The way IBM generated ALDs for the machines, they included only the installed features and RPQs, essentially customizing the documentation to the machine as it sat. Replacement or additional ALD pages came with any field installed feature or RPQ, to keep the docs in sync.

    The most I would get from a list of RPQs would be a guess about the intended function of the change, but no way to know where the cards and wiring were placed.

    Now, if we found ALDs from other 1401 systems which had the RPQ installed, assuming it was an IBM RPQ and not a change made by the owner long after maintenance ended, then the pages in the other ALD would match a good portion of what is in the mystery section. Not many 1401 ALDs remain in existence, alas.

  3. Hi Pete
    A team member found a manual listing common RPQs that multiple customers ordered. In it was an RPQ to change the groupmark from the 1401 card code (12-7-8) to the IBM 705 coding (12-5-8) for both reading and punching. It is not in our documentation, but we found two switches nicely hidden that are labeled Group Mark Read and Group Mark Punch, with both Normal and 705 settings. Put them to normal, all is well.