Monday, April 18, 2016

Have new fpga board working correctly


Implementing mirror 1442 reader/punch

My check box for the mirror mode of the 1442 is too far to the right and cut off on the GUI. Since I am changing the entire structure and interface, that will be resolved at the appropriate time. As I had said earlier, I can't test mirror mode until I have a working 1442 reader/punch. My 1442 has a broken part that needs some special reconstruction.

Testing new board and Vivado toolchain results

I found an additional parameter - enable flash bitstream - which I put into my source file for the USB firmware. With that installed, I had the board configuring itself from the bitstream and talking well to the Python code.

Next, I solved the anomalous status by finding that one of the two connectors to the ztex fgpa board was loose and making partial contact. With that rectified, I had very good results from single stepping through instructions - all the clock times and status I checked were spot on.

Next, I set up a memory file to load core to verify the operation of the new board. I will take that on tomorrow after I visit the dentist. 

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