Wednesday, August 24, 2016

Work on Diablo disk driver/emulator tool

Today is the day I spend with the 1401 restoration team at CHM, thus limited time for my own projects but I did move ahead a bit. At CHM, I replaced a set of brushes in a 729 tape drive, helped diagnose and fix a problem in the 1402 card reader,


I hooked up all the remaining wires on the board, lacking only the connections to the last, missing chip socket for it to be ready to have the disk cable soldered on. The sockets will be arriving tomorrow, so we will have a working extension board by end of week for certain.

The chips and my board for the emulator role have come in, but until I get the plug and shield I can't complete wiring up that side of the project.

I plan to add two sheets of insulation and then an upper and lower copper plate to help with signal integrity, given the discrete wire runs on the board. The copper sheets should arrive by Friday.

For simplicity, I will leverage the USB communications example projects provided by Digilent, which will allow me to easily load and fetch the contents of a RAM buffer on the fpga. The Xilinx Spartan 3E chip XC3S1200E on the Nexys2 board features 516,096 bits of block RAM.

The Block RAM on the fpga chip is enough to hold 32.256 words of Alto Diablo data, just over 121 sectors or about 5 cylinders. That is 2.5% of a disk cartridge.

The SDRAM on the Nexys2 board will hold more than seven full virtual disk cartridges, while we only need a cylinder buffer of 24 sectors and a single disk cartridge in RAM. I will leverage the Digilent Block RAM code to fetch and load the cylinder buffer.  Then, I will leverage the Digilent Memory code to fetch and load the virtual cartridge SDRAM.

Essentially I have to piece together a couple of reference project modules and some glue code to implement the transaction types I want for the tool. This allows me to use the Digilent supplied Adept utility right away, not having to complete any PC side code until it is convenient.

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