THE WATCHED POT NEVER BOILS - OR IN THIS CASE THE BIT NEVER FAILS
I set up the scope again to watch the exact analog signal occurring when bit 14 fails to set in the most common situation triggering the parity stops while using my 1130 MRAM memory board replacement for the IBM core memory circuitry. I put another on bit 10, which is the other that comes up less frequently.
Putting the machine in the perpetual Storage Display loop reading all memory locations, I found that bit 14 and bit 10 didn't fail. The machine ran longer until some other bit failed to latch into the Storage Buffer Register (SBR) and the machine stopped.
Observing the pin with a scope probe seems to stop or greatly reduce the rate of failures occurring for that bit. The 'quantum' behavior where the act of observation changes the results.
I had tried to recreate the electrical effect of the probe being attached, modeling the oscilloscope probes internal circuitry and applying what should be an equivalent set of components to the pin on the backplane where the sense pulse signal from my board arrives, the other end of the circuit hooked to the ground pin nearby The equivalent circuit did not reduce the failure rates at all. It was NOT equivalent to whatever analog magic happens with a jumper hooked to a probe is attached.
However, I just realized a significant difference exists between my equivalent circuit. When I hook up the four scope probes, the first one which picks up the Parity Stop signal is where I make a ground connection. That signal is in gate B, compartment A1 but the SBR cards where the other probes connect are all in gate B, compartment B1. Thus, the probe hooked to the pin for bit 14 has circuitry through the probe to the scope, but returning out of a different probe to ground on another compartment.
How that impacts the behavior I don't understand, but perhaps I can figure out the way the probe impacts the pin, then recreate the equivalent circuit.
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