Solved first problem but new persistent issue in memory

3132 CARD TESTED FINE, MOVED ON TO READ DRIVER/GATE CARDS

I put the card through its paces on the bench and found it was working perfectly. All traces had continuity on the board (backplane) as well. It was time to check the card that would drive lines where address bit 9 was a 1. 

SYMPTOMS AND DRIVER CARD LOGIC

The driver card contains drivers for all the groups where bit 9 is 1, meaning four groups representing the combinations of address bits 10 and 11. When I tested on the machine doing displays of various addresses, I found that all four groups were giving parity errors. The card has four circuits, thus the fault must affect all of them on the card. 

I planned to swap the cards and see if the issue moved to some other set of addresses, confirming it was a card problem. However, as I tried to remove the suspect 3467 card at slot H3, I found that it was loose. It had not been firmly inserted into the board. 

RESEATED CARD H3 AND THE ORIGINAL PROBLEM WENT AWAY

When I powered up again, the original addresses with bit 9 set to 1 were working fine. I was hopeful that this had been the only memory issue and I could move on to peripheral device controller logic debugging.

RAN STORAGE SCAN AND HIT NEW PARITY STOP PROBLEM

Using the Storage Display switch, which cycles through all memory addresses reading the contents, I found the machine stopped in the upper 4K of memory (address bit 3 set to 1) and the groups where address bit 9 is a 1. 

This failure is very consistent. The machine has a procedure to identify the failed driver cards, where you first set all bits to 1 with the Storage Load function, then set the machine to display and use the Storage Display function. It will stop with a parity error with an address whose bits highlight the bad driver card(s). 

In this case, it showed the card for the case where address bit 3 is 1 but also the card for the case where address bit 9 is a 1. The driver cards cover both halves of memory, upper and lower 4K, so if the card works properly for the first 4K with bit 9 = 1 then it shouldn't fail just because we are in the upper half. 

If the card that controls when address bit 3 is a 1 (upper 4K) is the issue it should cause the parity errors immediately with all the lower address bits still 0, but it waits until bit 9 is also 1. Bit 3 is an X axis selection and bit 9 is a Y axis selection. 

Bit three is combined with bits 4 and 5 to pick one group of 8 lines in the X axis. On the other side of the core plane, bits 6, 7 and 8 are used to select which of the 8 lines in the group are active. 

When I get back I will methodically test all combinations of 3, 4, 5 to see which of them cause problems when bit 9 is a 1. The test functions all stop on the first failure (3=1, 4=0 and 5=0) but it may or may not fail with the other combinations of 4 and 5. Similarly I would test to see which combinations of 9, 10 and 11 cause issues when bit 3 =1. 

For this to be a broken wire in core, the symptoms should be limited to a single wire, thus only one combination of 3, 4, 5, 6, 7 and 8 would cause the issue. If a driver card, then it could be groups of eight not a single wire. 

ADDRESSING IN THE CORE MEMORY

Core memory is addressed by driving a current down one X and one Y wire simultaneously, so that the current at the intersection is sufficient to flip the core but the other cores that are only on the X or Y line don't get enough energy to change state. 

Writing involves sending the current in one direction, while reading passes the current in the opposite direction to flip the core in the other direction. If the core was already in that direction (had a 0 value) then nothing much happens. However, if the core was in magnetized as a 1 bit, then flipping it will produce a pulse from the change that is detected by a sense wire that is threaded through all the cores on that core plane. Finally, when the write current is sent, if the desired state of the core is to be a 0, then a counter current is passed through the sense wire to lower the energy and prevent the core being set. 

The X axis has 64 wires and the Y address has 128, thus there are 8,192 intersections with a core that can be uniquely addressed. During a read, a driver sends current down a group of lines and a gate connects only one of those lines on the other side. Thus, eight drivers are used and eight or sixteen gates depending on the axis. 

The X axis read driver is wired through a block of diodes to sink current from all eight of the wires. Each of the circuits on the 3467 card are attached to a different group of eight lines, with one of those card circuits activated by its combination of address bits 3, 4 and 5. The same card will drive reads (sink current) or gate on writes (provide the 8.3V feed for the current), depending on the two control lines that are managed by the logic that manages the process of reading or writing. 

Every group of eight wires that are driven by the upper picture logic is also connected on the other side of the core plane by another 3467 card. When reading, the bottom card feeds 8.3V only to the one out of eight lines that are selected by bits 6, 7, and 8. Each group of eight has the same lines tied together - the first line of each group of eight is tied to the all the other first lines and hooked to the bottom circuit. 

Thus when selecting an X wire, we feed 8.3V through eight of the wires, one per group, going up from the bottom of the core plane to the top card, which sinks current from only one of the groups. The 8.3V on all the first lines of the other group will not flow anywhere because a circuit is not completed, but the first line in the selected group has a circuit to flow through the current sink in the top card. 

Similarly, the Y axis has a card that sinks current from one group of sixteen wires, through a diode array, when doing a read. During a write, it sources 8.3V through the same group of sixteen wires. All this is based on the address bits 9, 10 and 11 to pick which of eight such circuits on the card are activated. 

This is different from X because we have to select 128 unique wires in this direction. On the other side, two 3467 cards are used to select which of the sixteen wires in the group are active.

Each circuit on a 3467 card is assigned to one combination of bits 12, 13, 14 and 15. It will source 8.3V to its assigned wire in each group of 16. For example, bits 12=0, 13=0, 14=0 and 15=0 will source voltage to the first wire of each group of sixteen, with all first wires of the groups tied together. 

We can have errors in reading or writing when one or more of the driver or gate circuits on a 3467 card is not working properly, either selecting more than one wire at a time or not selecting a wire all all. The original error occurred when the 3467 in slot H3 was not fully inserted into the board, thus it was not sinking read current for four groups of sixteen Y axis wires. 

PUZZLES TO SOLVE

Why would bit 9 addressing cause problems in the upper 4K but not the lower 4K, since it is a common driver/gate card? Why would the failure involve BOTH bit 3=1 and bit 9=1 but not occur on either separately? What is common? The bits showing with the parity error do not seem to indicate a valid parity error, which is even more puzzling. One should see each half of the word plus its associated parity bit have an odd number of bits in total.