Debugging work on the multiply-divide issue with the 1130 MRAM board - memory fixed and working flawlessly!!!!!

FALSE BIT 13 WHEN READING CERTAIN ADDRESSES WITH UNKNOWN CONDITIONS

The CPU diagnostic runs a test of the multiply and divide hardware which consistently fails after having successfully tested many sets of values. The memory location that holds one of the values - 0x0CFB - will consistently create a parity check when I attempt to access it using the Display mode of the 1130. Bit 13 will be turned on in the Storage Buffer Register (SBR) after the location is read, but the P2 parity bit is set as if that bit is not on, thus generating the parity check. 

It is strange that I can use the Load mode of the 1130 to set the value in the word, dropping bit 13 so that it matches what I believe was intended, but the next Display will again see bit 13 on and suffer a parity check. I should be able to store a value in location 0x0CFB and retrieve it without the phantom bit 13 turning on.

Now, this does NOT happen when I first bring up the 1130 system. It does not happen if I use the Storage Load and Storage Display modes of the 1130. It only happens once the diagnostic has run and we reach the error stop for the multiply-divide test. Something has happened that puts the 1130 or the memory board in a condition that then causes this strange behavior. 

HAPPENED TO ADD A BRAIDED GROUND WIRE IN PARALLEL WITH 18GA STRANDED

I had dual 18 gauge ground wires to the PCB from the IBM 1130, but decided to use a braided ground wire in place of one of the regular stranded wires. The thought was that the braided wire has many more strands, smaller strands, which gives a lower impedance path for high frequency currents to ground that ordinary stranded wire. 

I then ran the CPU Diagnostic to successful completion about ten times, then loaded the core memory diagnostic program and ran it multiple times to successful completion. The problem was indeed ground impedance, as one of my readers had been suspecting. In the DC domain I had extremely low impedance with the multiple heavy ground wires but the issue was the fast switching demands of the chips.

MEMORY SUBSTITUTE BOARD NOW WORKING PERFECTLY

The project is finally working to my satisfaction. I will update the bill of materials and build instructions to cover the very necessary braided ground wire. 

MINOR IMPROVEMENTS TO THE PCB DESIGN

Last night I broadened the ground traces for the MRAM chip on the board and added a second decoupling capacitor under the chip, a 10uF tantalum next to the .1uF ceramic. I also opened the solder mask for the four ground pads that would be used to solder a magnetic shield over the chip on the PCB. Unless I see evidence that the fault is one that these are needed to correct, I won't be building the new PCB but I am sharing the improved version on Github.