Checking signals and termination resistors on the Virtual 2315 Cartridge Facility - part 2

SIGNALS BEING OBSERVED AND THEIR PURPOSE

The cable that connects the 1130 to the 2310 can carry up to 20 signals on the 24 connector pins, although in the implementation used in the 1130 only 17 are defined, with one of them connected to two pins on the connector thus 18 pins are wired. 

1. Write Data and Clock - sent by the 1130 when writing data to the disk drive. not connected to the 2310 since the V2315CF box intercepts all data streams to and from the disk
2. Access Ready - a feedback signal from the disk that informs the 1130 when a seek (movement) of the disk arm takes place
3. -10/+20 Mil Step Size - 1130 sets this to move the disk arm one or two cylinders in a step
4. Home Cylinder - 2310 sets this when the disk arm is at cylinder 0
5. 90 Second Relay - the 2310 waits 90 seconds after beginning to spin before it will load the heads down onto the platter and be ready for access. 1130 won't allow write attempt until this is active.
6. Write Clock Phase B - sent by 2310 to the 1130 to have it alternate clock and data pulses on signal (1) above. Sent by V2315CF in this implementation.
7. -Reverse/+Forward Step Direction - requests 2310 to move arm towards home cylinder or forward towards cylinder 202. 
8. Access Go - request from 1130 to move the arm based on step size and step direction signal states. Passed directly to 2310 but monitored by V2315CF to shadow the location of the disk arm. 
9. Write Select Error - status from 2310 that an error occured during a write. Emitted by V2315CF to signal an error in real mode by passing state of 2310 signal.
10. Write Gate (and Erase Gate) - set to turn on the erase coil and activate the write electronics of the 2310 disk drive. Both pins connected to same wire on cable. V2315CF reads these and based on them, will capture data streaming in on signal (1). 
11. Index Marker - pulse emitted once per revolution of the disk platter in the 2310 to reset sector counter to that 1130 always knew which of the four sectors was approaching next. 
12. Head Select - picks whether the read or write occurs for the data from the top or the bottom of the platter in the 2315 cartridge in the disk drive. Used by V2315CF to decide which data to stream or where to put data sent from the 1130 during a write. 
13. File Ready - indicates that the drive is up to speed, 90 seconds has elapsed to allow time to clear out particles in the air inside the 2310, and the circuits are ready to read, write and seek on command from the 1130. Sent by V2315CF to 1130 in real mode when the 2310 sends this signal and we have a valid virtual cartridge image loaded into the V2315CF. 
14. Sector Marker - pulses that indicate where the disk platter is in its rotation. Passed from 2310 to 1130 while in real mode, but also monitored by V2315CF to understand which sector of data to send during a read or update during a write. 
15. Read Gate - sent by 1130 to 2310, but in this implementation only watched by V2315CF. When on, it causes the data for the sector being requested to be streamed out over the Read Data and Read Clock lines at the time it would occur with the real platter on the 2310 based on its rotational position.
16. Read Clock - a pulse emitted once per bit cell that causes the 1130 disk controller logic to watch the Read Data line to see if a pulse arrives before the next Read Clock pulse. Presence of a pulse makes this bit value a 1, while absence on Read Data means the bit value was 0. Produced by V2315CF. 
17. Read Data - emitted in between clock pulses on Read Clock, when the value of the bit is a 1. If the bit is a zero, no pulse is emitted on Read Data until the next Read Clock introduces the next bit cell. Produced by V2315CF. 

SIGNAL RINGING, DISTORTION OR SWING LIMITING IDENTIFIED

For each of the 17 signals, the oscilloscope captured a change in the signal at the receiving end. Thus, for a signal like Read Gate that is sent from the 1130 only to the V2315CF, the signal is probed on the V2315CF. For a signal like Access Go that is produced in the 1130 and passed directly to the 2310, it also is sent to the V2315CF. Thus I monitor at both the 2310 and the V2315CF. A signal like Read Data that comes from the V2315CF to the 1130 is probed at the 1130. 

For some signals, having the terminator resistors in place may cause the signal to fail to be driven fully to logic low, thus they must be removed. This is because the pair of resistors used to establish the impedance matching have low values, fighting against the pull-down of the source particularly due to cumulative voltage drop over the long signal path. 

Other signals didn't rises high enough to provide a clean signal for the V2315CF to monitor correctly. The logic chips in the V2315CF and the FPGA watching the signals define a forbidden zone of signal voltages that sits above the highest voltage that can be considered logic low and sits below the lowest voltage that can be considered a legitimate logic high. If the signal is in the forbidden zone, the behavior in the V2315CF is going to be flakey. 

The IBM Solid Logic Technology (SLT) used in the 1130 and disk drive electronics is a form of Diode-Transistor Logic where the only thing that counts is whether the driver pulls the receiver down close enough to ground to cause the inverting transistor to conduct. It is actually the flow of current into the driver that produces the action of the receiving gate, while a logic high is simply the absence of that current flow to ground. Thus, the voltage for a logic high is irrelevant. It can be 1V, for example, right in the forbidden zone of modern logic chips, or even much higher than the 3V that is nominally a logic high for SLT. 

In some cases, leaving the termination resistors off for a given signal will allow it to pull down near enough to ground to activate the SLT circuits, swing high enough when logic high to be safely out of the forbidden zone of the V2315CF, and not have too much ringing or distortion due to impedance discontinuities. 

In some cases, weaker termination resistors will be needed to guarantee a high enough voltage for logic high and still permit the driver to pull the signal low enough to qualify for SLT and V2315CF logic low. These resistors pull up the logic high level to an appropriate voltage for good V2315CF detection. This goes mean that we don't have good impedance matching for that end of the signal, but if the ringing and distortion aren't causing problems this is acceptable. 

The challenge is that we have two modes of operation - virtual and real. For some signals, the driver is in the disk drive in real mode and in V2315CF in virtual mode; for example, the -Sector Marker pulses. Some signals between the 1130 and the internal disk drive are directly connected by electronic switch chips when in real mode, but opened so that the V2315CF can drive the signal in virtual mode. This means that those signals work correctly with a termination resistor choice in one mode but fail in the other. 

DECISION ON TERMINATION FOR EACH SIGNAL

-Sector Mark and -Index Marker pulses come from the 2310 in real mode and from the V2315CF in virtual mode, thus they involve shorting and may need a different termination strategy based on mode. The cylinder zero detection signal -Home is also shorted or not based on mode. 

The +Access Ready signal cannot have terminator resistors installed, while the -Access Go works well with them in place while in real mode. Signals that are not timing critical, such as -10 Mil/+20 Mil Step can work without termination resistors because any ringing or bounce will be resolved before they are utilized in the 2310 or V2315CF. 

I can compensate for ringing in the FPGA of the V2315CF if those glitches are short enough that they are invisible to SLT circuits but observable with the much faster technology in the V2315CF. I did this, for example, with -Access Go and +Access Ready. 

Slow changing signals that do not trigger state machines, such as -Head Select or -10/+20 Mil should not have any glitch or ringing risk but they do need to meet the logic low and logic high requirements of V2315CF if they are monitored and used inside the FPGA and they also must allow the signal to pull down low enough to be valid for SLT gate operation. Interestingly, I observed some bizarre glitches in the -Reverse/+Forward signal, which didn't impact either the V2315CF shadowing nor the operation of the internal disk drive. 

The data streams that would have come from the disk heads and the new data that would have been written through the disk heads of the 2310 are always routed between V2315CF and 1130, ignoring the 2310. I can set high value termination resistors for those signals without any difficulties because they don't differ between real and virtual mode of operation. These are -Read Clock, -Read Data, and -Write Data and Clock.The control signals -Read Gate and -Write Gate are similar - they never involve the 2310 thus don't change based on mode.

Having watched each signal and validated how it operated in both real and virtual mode, I was confident that I knew how to manage the termination board resistors. I installed the new resistor values and had very solid results doing seeks. I then attempted reads and writes, discovering anomalous signals coming from the 1130 at the root of the issues, and eventually discovered that somehow a cable that plugs into gate A, Compartment C1 on the bottom row - T6 and T7 to use the IBM numbering scheme - had come loose. Fixing this involved removing many of the SLT cards from the compartment and reseating the cables. I ran out of shop time as I finished up this task. 

Loose connectors