Thursday, October 13, 2016

Verified data and formating on disk cartridge, working through my logic to read the header field


The steps that will occur and must be verified, with completed steps in gray:
  1. Readsector logic is waiting for a sector match
  2. Indexmarker occurs, signalling that next sector mark is for sector 0
  3. Sectormark occurs, thus we are in sector 0 now
  4. Gotsector is emitted to indicate we have a match
  5. Readsector logic moves on to setup for record 1 of the sector
  6. Readfield logic is triggered
  7. Readfield waits for approximate 200 us preamble before looking at incoming data
  8. Roughly 120 us of zero data bits are seen
  9. A 1 data bit completes the sync word
  10. the logic recognizes the synced state
  11. Two words of the header record are deserialized, extracted and saved
  12. The checksum is calculated correctly for the two words of the header record
  13. The next word is deserialized, extracted and used as a checksum
  14. The checksum verification test occurs properly
  15. The readfield logic completes
  16. The deserializer goes to the unsynchronized state
  17. The readfield logic for the next record, label, begins
  18. The appropriate preamble is passed before we look for sync
  19. Enough zero bits are read to properly set up sync logic
  20. A 1 bit is read and the sync condition is attained
  21. Eight words of the label record are deserialized, extracted and saved
  22. The checksum is properly calculated for the 8 label words
  23. The next word is deserialized, extracted and used as a checksum
  24. The checksum verification test is done correctly
  25. The readfield logic ends
  26. Sync is dropped
  27. The readfield logic is entered for the data record
  28. A suitable preamble is passed before attempting sync
  29. Enough zeroes are read for the sync engine to work properly
  30. A 1 bit arrives and we attain the sync condition
  31. 256 words are deserialized, extracted and saved as the data record
  32. The checksum is properly calculated
  33. The next word is deserialized, extracted and saved as the checksum
  34. The final checksum test is done properly
  35. Readfield logic ends
  36. Sync is dropped
  37. The readsector logic completes
  38. Appropriate completion status is set in Reg0001
  39. The next sectormark does not occur until after step 36
I brought out several more signals and wired them to the logic analyzer, before running more tests. They helped quite a bit in testing the next few items on the list above. I came to a few immediate conclusions:
  • the checksum word is not read properly from disk - comes in as 0000
  • i am matching on the proper sector number
  • my logic to save the checksum status in Reg0001 is not correct
The signal patterns coming in from disk as Read Clock and Read Data are well formed. The have transitions must faster than the 50ns maximum and are a nominal 100ns wide. The clock exhibits some jitter from pulse to pulse which is understandable. 

All of my testing to date is predicated on the belief that the disk cartridge I received, labeled Alto Smalltalk, is in fact written by an ALTO and in the proper three record per sector format of that machine. 

I decided to record all the data bits on sector zero and see if they match up to what I should be seeing. I checked cylinders 0, 5 and 10 with sector 0, all good. I will check a few other cylinders and sectors for their formatting.What I noticed is that when I set Head to 0, I see a header field with the bit x0004 set, and Head of 1 gets x0000 so I probably have the sense of Head inverted. 

I made some tweaks to deal with the checksum error status recording and to reset all transactions anytime the command register (Reg0000) goes to zero. Time to resume testing. It does appear I am recording the checksum errors now

I see that my deserializer is not properly handling the serial stream. Where the disk has 002C my extraction was 602C. It began with spurious bits, but when I look on the logic analyzer the Read Data line was always 0 and should not have triggered a 1 into the shift register.

I have not completed step 11 above, but feeling good about the progress. I am going to stare at my deserializer and think about what I can do to improve its accuracy, perhaps by recoding. 

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