I hope to be running on the physical drive tomorrow, using the cartridges, but have to carefully clean the heads, the cartridges and inspect everything before I power up the drive.
ALTO DISK TOOL
This morning, the Xilinx ISE toolchain decided it would loop forever in synthesis. Sigh. Wonder what I have to do in terms of secret handshakes, irrelevants changes to source and incantations to get this software to work properly.
I scrutinized the synthesis report (the part that was completed) and addressed some small issues, hoping to kick this back into gear. That did nothing.
By midafternoon I concluded that I had a lot of integer arithmetic that should have had adders synthesized but was likely causing the problem. I changed the logic to accomplish the offsets with SLV rather than integer, before converting to integer for indexing, but the tool remained stubborn..
More random guessing and changes, the only path forward to an eventual resolution to this problem. I believe the problem I am encountering is based on having to multiplex 72 bits, from 24 index positions of a 3 bit array, test each such bit and set the appropriate symbol for the GUI.
I need to find a way to slash the amount of multiplexing required, perhaps converting this into a 24 cycle loop to fetch each of the 3 bit values per clock cycle. I created the FSM to set the row symbols based on accessing 24 sector bit vectors in a loop, trigging this when the cylinder number is changed or when I reach the end cylinder of my 'read a cartridge' FSM.
The new FSM approach got me past the infinite loop problem. The output wasn't ideal, with odd symbols displayed in the rows. It may be a flaw in my new FSM, which I will look into soon.
This GUI flaw becomes lower priority as I work on the disk emulation role. There is also a problem with the three record checksum error messages - they never display. Something is quite flawed in the vgatext module I am using.
I began creating the seek emulation logic for the disk emulator role. It has to match the timing, which is 600 us per cylinder plus a settle time of 14400 us. This gives a minimum seek time of 15ms and a max seek of 136.2 ms versus the nominal 135 ms of a real drive.
The signal interlocking is as follows:
- strobe turns on to start a seek or restore operation
- ready to seek/read/write goes false in 2.5 us
- my logic will latch the cylinder address and give ack signal
- if cyl < 203, address acknowledge goes active in 30 us for 5 us duration
- if cyl > 202, logical address interlock goes active in 30 us for 5 us
- calculate timing for .6 ms X cylinders moved + 14.4 ms settle time
- ready to seek/read/write goes true in calculated time after strobe
I copied over my sector mark, index mark and sector address generation logic from the test generator module to the main routine, for use while in disk emulator mode. I selected switch 3 to halt the drive when off, or go ready after 90 seconds when the switch is turned on.
I am fairly well along with the seek modeling logic although I still have to set up the Restore behavior and a few other subleties.