Friday, November 28, 2014

More construction of SAC interface box


I got up and began working as soon as the sun was up enough to light my worktable in the garage, my top priority being to finish the interface board wiring to the 160 pin socket and to the connectors that will fit onto the fpga board assembly.

I found that the rigors of pushing in the pins to the connectors would often stress the solid wires I had used for the links, I decided I had to abandon those and replace them with thin stranded wires. I hate connectors,  which often become the most fragile part of my assemblies.

In this case, my decision to insert wires directly into a circuit board on one end and into crimp on pins for the other left me with a 'no win' scenario. Pushing multistrand wire through a PC board hole is an exercise in frustration, but using single conductor wire to the crimp connectors inevitably leads to the wire snapping off the connector after some degree of flexing.

The leads from the 160 pin socket to the board have the same issue, but one I optimized for ruggedness by using stranded wire on that side. I soldered a small section of solid wire to the end of one side to form a 'pin' I could push into a PCB hole and solder.

I will need to replace all the TTL signal wires with stranded wire, solder on solid 'pins' for the PCB side and crimp them on at the connector end. I realized I can use the ends of the existing solid wire, where they exit the PCB, as the 'pin' to avoid having to rework three boards times 24 leads each plus another five on the last board. Unsoldering, cleaning up and resoldering all that would have been a major pain.

Another task for the day was to select the mounting location for the FPGA board stack, drill the holes and mount it inside my enclosure. I made a paper guide for marking and drilling the bottom of the cabinet. The stack of two boards, FPGA and debugging/breakout,  is now mounted in place and ready for the connectors to be affixed.

FPGA board and breakout daughter card mounted inside enclosure
By 4PM, after working most of the day, I had the TTL side signal wires from the first two boards attached to the connectors and had begun on the third board. When the rest are hooked to the connectors, I have to tape up the soldered junctions between solid and stranded wires, dress everything up with cable ties, and then install the connectors onto the breakout board.

Separating interface boards while wiring them to fpga connectors
There is too much to do in the remaining daylight, so I will move inside and work on coding. I am implementing the FPGA side basic link to communicate with a PC (and also have to write the software to run on a PC.) The Visual Studio support for Python looks solid and I should have no problems using accessing the Adept libraries by using the 'ctypes' package in Python.

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