Saturday, November 15, 2014

Steady progress wiring the SAC interface box

I did what I could before my trip early tomorrow morning, now it is time to collect all the notes I need to bring on my trip so that I can continue with design and development, especially writing VHDL for the interface box.


Locating the signal pairs and attaching them to the interface boards is very slow going. It took over three hours to attach lines to twelve receiver circuits of one board. By lunchtime Saturday I have board 4 with its five drivers completed, the receivers of board 3 completed, and just over half the receivers of board 2 attached.

Mid day hooking signals to their assigned boards
Remaining are 17 receiver pairs and 36 driver pairs. Since I have done 19 receivers and 5 drivers, I am only halfway through receivers and 5/41 through the drivers. At this pace, I won't be done wiring the signal line pairs before my trip to New Orleans and London, but I can at least plan to wrap up board 3 and install it, plus add some drivers and finish all the receivers on board 2.

I worked out the grounding state of four of the six remaining pins and have installed them into the socket. Two pins remain whose treatment I have to study by reference to the 1131 socket - they are not used for signals as we only needed 77 of the 80 possible pairs but these could be grounded, open or attached to some circuitry in the 1131; the exact use determines what I should do on my end of the cable.

After a bit more progress than I expected, I know have boards 2, 3 and 4 complete and installed. Once I return, I can install the remaining signals to the 12 receiver and 12 driver circuits on board 1 to finish the 1130 side of the interface. Next up:

  • Install power supply with +5 and +3 V for the interface board and FPGA
  • Mount the fpga board inside the enclosure
  • Finalize the connection method for the 77 I/Os to the fpga, buy parts and build it
  • Write minimal VHDL for the fpga with quick test mode

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