Thursday, January 6, 2022

Found undocumented modifications to both Documation readers that cause problems

 INVESTIGATING THE ISSUE WITH RIGHT HAND DIAGONALLY NOTCHED CARDS

The Documation does error checking by testing whether any light is visible to the phototransistors at the time when the card is just past the last column (80) of data. Punched cards can be made with a diagonal notch on the upper section of the left or right hand side. This reader is known to issue a Read Check in error for any right hand notched card. 

The logic of the matching will count card columns, beginning with the first moment that the leading (left) edge of the card obscures the light to the phototransistors. It counts up with column 0 being the space just to the left of the first data on the card, eighty columns of valid data, then the trailing side is column 81 before the right edge clears the phototransistors. 

At the time of column 0 and again at the time of column 81, it verifies that none of the 12 phototransistors, representing rows 12, 11 and 0 to 9, have light reaching them. If any of the transistors sees light, a Read Check is indicated. The machine also tests at the time when the counter reaches column number 84 to be sure that the card has fully and completely moved beyond the phototransistors; if any of the rows is darkened then a Read Check is also generated. 

The failure in this card reader occurs when the highest phototransistor, reading row 12, sees some light passing through because the diagonal notch reaches the row 12 area. At column 81 time, row 12 is illuminated and we trigger the error. The diagonal notch also passes row 12 light at column 0 time, but by time the check is made it has moved over the light enough to pass the test, due to technicalities of when the state of the light is sampled and when the 'dark check' is made at CR0 and CR81 times. 

MY MODIFICATION SHOULD HAVE FIXED THE ISSUE BUT WAS NOT WORKING

I created a modification that forced row 12 to appear dark while the signal for column 81 is active, thus the 'dark check' passes as long as rows 11 and 0 to 9 are all dark. It picks up the CR81 signal, triggers a MOSFET transistor that will pull the row 12 wired-OR junction down to ground which logically represents a dark phototransistor. 

I still saw Read Check errors with right side notched cards. I put the scope on it, triggering on the CR81 signal in anticipation of watching the row signals and other signals involved in the 'dark check' at the same time. What I saw, however, was two CR81 signals. That shouldn't happen. I was getting the signal for both column 81 and column 82 times, but by the time of column 82 we would also have light hitting row 11 and maybe 0, thus generating our error even though I was blocking row 12. 

I ran the logic analyzer and saw the two different CR81 signals. The reader turned off the flipflop that sends the index marker pulses to the controller after the first, but the column count continues to increment until it reaches 84 and terminates the reading cycle. The second CR81 arrived just about ten microseconds after the light spilled around the notch and illuminated the phototransistor. In comparison moving one column takes about 500 microseconds so we caught the light in the last 2% of the column movement. 

DIGGING INTO THE DUPLICATE COLUMN 81 SIGNALS (CR81)

I looked closely at the PCB where the CR81 signal is generated and began to move the scope probe around to check the cause. The first place I was going to probe was the pin on the 8 input NAND gate which looked at the low order bit of the column count, as the failure symptoms suggested this was the cause. There was a resistor tacked onto that pin and the other end pulled the input up to the VCC rail!

low bit input pulled to VCC

That forced the input to be 1 for two different column times. This is why I was getting doubled CR81 pulses. Looking closely at the card I could see that the trace connecting the low bit of the counter to the NAND gate had been scraped away. This was a deliberate modification.

Modifications I discovered on clock card

Oddly, the other reader I have, an M600 model, has the exact same modification made to it! None of the schematics or other manuals for Documation readers show this or explain it. I removed the resistor and restored the link with a jumper wire. The machine read a group of cards including several with right hand notches without a Read Check!

All that remained was to read some cards including those with valid data row 12 of column 80, to be sure my modifications didn't break anything. Alas, the flaky behavior returned.

ERRATIC BEHAVIOR RESUMED

The position of the card tray determines whether the reader logic works and even the signal lights illuminating for state such as Stop and Reset. Various failure modes crop up based on whatever intermittent contacts are causing this issue. 

I will have to get to the bottom of this failure mode and correct it once and for all if I am going to be able to wrap up the repairs and use this reader to archive the remaining cards. I left the shop because I want to be situation for the SpaceX launch later this afternoon, but I am determined to root out and eliminate this issue when I next visit.

4 comments:

  1. What would be the purpose of cutting the trace and adding the resistor?

    ReplyDelete
    Replies
    1. Hi Wildcatmatt. This will cause two checks for all dark rows at two consecutive column positions. It forces the low order bit to be a 1.

      It is possible that this causes dark checks at columns 80 and 81, rather than 81 and 82, in which case any holes other than row 12 in the last column are going to force a read check.

      Why someone would want this is unclear. Since these machines were widely used for voting at one point long after their role for general punched card input, the voting cards may have reserved column 80 and used this check for more assurance that the card didn't slip during the pass through the reader.

      The wiring of the counter in the schematic makes it appear that a decimal 80 would trigger the CR81 signal, selecting the inverse of the counter bit as input to the NAND. If so, forcing it high makes it look like two cycles of 80 would occur, the new one just after the original version.

      If this causes CR81 to check at the wrong time, I will simply move the input jumper from the inverted low bit output over to the normal low bit output.

      Delete
    2. There is a clock card on ebay right now and it does NOT have the resistor modification that my two readers suffer from.
      https://www.ebay.com/itm/294073381686?hash=item447823b336:g:zZ0AAOSwaPdgypPK&autorefresh=true

      Delete
  2. Thanks for posting, Carl. It makes my day to read your blog.

    ReplyDelete